xref: /llvm-project/llvm/test/CodeGen/X86/pr30284.ll (revision 0f8e0f4228805cbecce13dcfadef4c48a4f0f4cd)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=avx512dq | FileCheck %s
3
4define void @undef_cond() {
5; CHECK-LABEL: undef_cond:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    retl
8  %a_load22 = load <16 x i64>, ptr null, align 1
9  %bitop = or <16 x i64> %a_load22, <i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736>
10  %v.i = load <16 x i64>, ptr null
11  %v1.i41 = select <16 x i1> undef, <16 x i64> %bitop, <16 x i64> %v.i
12  store <16 x i64> %v1.i41, ptr null
13  ret void
14}
15
16define void @f_f___un_3C_unf_3E_un_3C_unf_3E_(<16 x i1> %x) {
17; CHECK-LABEL: f_f___un_3C_unf_3E_un_3C_unf_3E_:
18; CHECK:       # %bb.0:
19; CHECK-NEXT:    vpmovsxbd %xmm0, %zmm0
20; CHECK-NEXT:    vpslld $31, %zmm0, %zmm0
21; CHECK-NEXT:    vpmovd2m %zmm0, %k1
22; CHECK-NEXT:    vmovapd 0, %zmm0
23; CHECK-NEXT:    vmovapd 64, %zmm1
24; CHECK-NEXT:    vbroadcastsd {{.*#+}} zmm2 = [0,16,0,16,0,16,0,16,0,16,0,16,0,16,0,16]
25; CHECK-NEXT:    kshiftrw $8, %k1, %k2
26; CHECK-NEXT:    vorpd %zmm2, %zmm1, %zmm1 {%k2}
27; CHECK-NEXT:    vorpd %zmm2, %zmm0, %zmm0 {%k1}
28; CHECK-NEXT:    vmovapd %zmm0, 0
29; CHECK-NEXT:    vmovapd %zmm1, 64
30; CHECK-NEXT:    vzeroupper
31; CHECK-NEXT:    retl
32  %a_load22 = load <16 x i64>, ptr null, align 1
33  %bitop = or <16 x i64> %a_load22, <i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736, i64 68719476736>
34  %v.i = load <16 x i64>, ptr null
35  %v1.i41 = select <16 x i1> %x, <16 x i64> %bitop, <16 x i64> %v.i
36  store <16 x i64> %v1.i41, ptr null
37  ret void
38}
39