xref: /llvm-project/llvm/test/CodeGen/X86/pr114360.ll (revision 7ed36b9ec6147fbada27592292bca28f9f76c983)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; REQUIRES: asserts
3; RUN: llc < %s -mtriple=x86_64-- -debug-counter=dagcombine=0 | FileCheck %s
4
5; BUG: shrinkAndImmediate folds away the AND after the ZEXT has already been folded away to SUBREG_TO_REG losing implicit zext.
6define i64 @test() {
7; CHECK-LABEL: test:
8; CHECK:       # %bb.0:
9; CHECK-NEXT:    movabsq $-4294967295, %rax # imm = 0xFFFFFFFF00000001
10; CHECK-NEXT:    movzwl %ax, %eax
11; CHECK-NEXT:    retq
12  %x = bitcast i64 u0xffffffff00000001 to i64
13  %t = trunc i64 %x to i32
14  %a = and i32 %t, 1
15  %e = zext i32 %a to i64
16  ret i64 %e
17}
18