xref: /llvm-project/llvm/test/CodeGen/X86/peephole-copy.mir (revision 9a091de7fe83af010e6ce38e2ed1227ef475bf49)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
2# RUN: llc -mtriple=i686-- -run-pass=peephole-opt %s -o - | FileCheck %s
3--- |
4  define void @c() {
5  entry:
6    tail call void asm sideeffect "", "q,~{dirflag},~{fpsr},~{flags}"(i32 512)
7    tail call void asm sideeffect "", "q,~{dirflag},~{fpsr},~{flags}"(i32 512)
8    ret void
9  }
10...
11---
12# In peephole optimization the modified COPY instruction should not cause
13# compiler failure.
14name: c
15tracksRegLiveness: true
16registers:
17  - { id: 0, class: gr32_abcd }
18  - { id: 1, class: gr32_abcd }
19  - { id: 2, class: gr32 }
20
21body: |
22  bb.0:
23    ; CHECK-LABEL: name: c
24    ; CHECK: [[MOV32ri:%[0-9]+]]:gr32_abcd = MOV32ri 512
25    ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 2359305 /* reguse:GR32 */, [[MOV32ri]], 1 /* reguse */, implicit-def early-clobber $df
26    ; CHECK-NEXT: [[MOV32ri1:%[0-9]+]]:gr32_abcd = MOV32ri 512
27    ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 2359305 /* reguse:GR32 */, [[MOV32ri1]], 1 /* reguse */, implicit-def early-clobber $df
28    ; CHECK-NEXT: RET 0
29    %2 = MOV32ri 512
30    %0 = COPY %2
31    INLINEASM &"", 1 /* sideeffect attdialect */, 2359305 /* reguse:GR32_ABCD */, %0:gr32_abcd, 1 /* clobber */, implicit-def early-clobber $df
32    %1 = COPY %2
33    INLINEASM &"", 1 /* sideeffect attdialect */, 2359305 /* reguse:GR32_ABCD */, %1:gr32_abcd, 1 /* clobber */, implicit-def early-clobber $df
34    RET 0
35...
36