1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s -mattr=+sse2,+sse4.1 | FileCheck %s 3 4; A single memory write 5define void @func_4_8(<4 x i8> %param, ptr %p) { 6; CHECK-LABEL: func_4_8: 7; CHECK: # %bb.0: 8; CHECK-NEXT: paddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 9; CHECK-NEXT: movd %xmm0, (%rdi) 10; CHECK-NEXT: retq 11 %r = add <4 x i8> %param, <i8 1, i8 2, i8 3, i8 4> 12 store <4 x i8> %r, ptr %p 13 ret void 14} 15 16define void @func_4_16(<4 x i16> %param, ptr %p) { 17; CHECK-LABEL: func_4_16: 18; CHECK: # %bb.0: 19; CHECK-NEXT: paddw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 20; CHECK-NEXT: movq %xmm0, (%rdi) 21; CHECK-NEXT: retq 22 %r = add <4 x i16> %param, <i16 1, i16 2, i16 3, i16 4> 23 store <4 x i16> %r, ptr %p 24 ret void 25} 26 27define void @func_8_8(<8 x i8> %param, ptr %p) { 28; CHECK-LABEL: func_8_8: 29; CHECK: # %bb.0: 30; CHECK-NEXT: paddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 31; CHECK-NEXT: movq %xmm0, (%rdi) 32; CHECK-NEXT: retq 33 %r = add <8 x i8> %param, <i8 1, i8 2, i8 3, i8 4, i8 1, i8 2, i8 3, i8 4> 34 store <8 x i8> %r, ptr %p 35 ret void 36} 37 38define void @func_2_32(<2 x i32> %param, ptr %p) { 39; CHECK-LABEL: func_2_32: 40; CHECK: # %bb.0: 41; CHECK-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 42; CHECK-NEXT: movq %xmm0, (%rdi) 43; CHECK-NEXT: retq 44 %r = add <2 x i32> %param, <i32 1, i32 2> 45 store <2 x i32> %r, ptr %p 46 ret void 47} 48 49