xref: /llvm-project/llvm/test/CodeGen/X86/narrow-shl-cst.ll (revision b53ea2b9c5ac252fa417f5fe76ce805bb09ed1ab) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
3; PR5039
4
5define i32 @test1(i32 %x) nounwind {
6; CHECK-LABEL: test1:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    movl %edi, %eax
9; CHECK-NEXT:    andl $31, %eax
10; CHECK-NEXT:    shll $10, %eax
11; CHECK-NEXT:    retq
12  %and = shl i32 %x, 10
13  %shl = and i32 %and, 31744
14  ret i32 %shl
15}
16
17define i32 @test2(i32 %x) nounwind {
18; CHECK-LABEL: test2:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    movl %edi, %eax
21; CHECK-NEXT:    orl $31, %eax
22; CHECK-NEXT:    shll $10, %eax
23; CHECK-NEXT:    retq
24  %or = shl i32 %x, 10
25  %shl = or i32 %or, 31744
26  ret i32 %shl
27}
28
29define i32 @test3(i32 %x) nounwind {
30; CHECK-LABEL: test3:
31; CHECK:       # %bb.0:
32; CHECK-NEXT:    movl %edi, %eax
33; CHECK-NEXT:    xorl $31, %eax
34; CHECK-NEXT:    shll $10, %eax
35; CHECK-NEXT:    retq
36  %xor = shl i32 %x, 10
37  %shl = xor i32 %xor, 31744
38  ret i32 %shl
39}
40
41define i64 @test4(i64 %x) nounwind {
42; CHECK-LABEL: test4:
43; CHECK:       # %bb.0:
44; CHECK-NEXT:    movq %rdi, %rax
45; CHECK-NEXT:    andl $241, %eax
46; CHECK-NEXT:    shlq $40, %rax
47; CHECK-NEXT:    retq
48  %and = shl i64 %x, 40
49  %shl = and i64 %and, 264982302294016
50  ret i64 %shl
51}
52
53define i64 @test5(i64 %x) nounwind {
54; CHECK-LABEL: test5:
55; CHECK:       # %bb.0:
56; CHECK-NEXT:    movq %rdi, %rax
57; CHECK-NEXT:    andl $31, %eax
58; CHECK-NEXT:    shlq $40, %rax
59; CHECK-NEXT:    retq
60  %and = shl i64 %x, 40
61  %shl = and i64 %and, 34084860461056
62  ret i64 %shl
63}
64
65define i64 @test6(i64 %x) nounwind {
66; CHECK-LABEL: test6:
67; CHECK:       # %bb.0:
68; CHECK-NEXT:    movq %rdi, %rax
69; CHECK-NEXT:    andl $-65536, %eax # imm = 0xFFFF0000
70; CHECK-NEXT:    shlq $32, %rax
71; CHECK-NEXT:    retq
72  %and = shl i64 %x, 32
73  %shl = and i64 %and, -281474976710656
74  ret i64 %shl
75}
76
77define i64 @test7(i64 %x) nounwind {
78; CHECK-LABEL: test7:
79; CHECK:       # %bb.0:
80; CHECK-NEXT:    movq %rdi, %rax
81; CHECK-NEXT:    orq $241, %rax
82; CHECK-NEXT:    shlq $40, %rax
83; CHECK-NEXT:    retq
84  %or = shl i64 %x, 40
85  %shl = or i64 %or, 264982302294016
86  ret i64 %shl
87}
88
89define i64 @test8(i64 %x) nounwind {
90; CHECK-LABEL: test8:
91; CHECK:       # %bb.0:
92; CHECK-NEXT:    movq %rdi, %rax
93; CHECK-NEXT:    orq $31, %rax
94; CHECK-NEXT:    shlq $40, %rax
95; CHECK-NEXT:    retq
96  %or = shl i64 %x, 40
97  %shl = or i64 %or, 34084860461056
98  ret i64 %shl
99}
100
101define i64 @test9(i64 %x) nounwind {
102; CHECK-LABEL: test9:
103; CHECK:       # %bb.0:
104; CHECK-NEXT:    movq %rdi, %rax
105; CHECK-NEXT:    xorq $241, %rax
106; CHECK-NEXT:    shlq $40, %rax
107; CHECK-NEXT:    retq
108  %xor = shl i64 %x, 40
109  %shl = xor i64 %xor, 264982302294016
110  ret i64 %shl
111}
112
113define i64 @test10(i64 %x) nounwind {
114; CHECK-LABEL: test10:
115; CHECK:       # %bb.0:
116; CHECK-NEXT:    movq %rdi, %rax
117; CHECK-NEXT:    xorq $31, %rax
118; CHECK-NEXT:    shlq $40, %rax
119; CHECK-NEXT:    retq
120  %xor = shl i64 %x, 40
121  %shl = xor i64 %xor, 34084860461056
122  ret i64 %shl
123}
124
125define i64 @test11(i64 %x) nounwind {
126; CHECK-LABEL: test11:
127; CHECK:       # %bb.0:
128; CHECK-NEXT:    movq %rdi, %rax
129; CHECK-NEXT:    xorq $-65536, %rax # imm = 0xFFFF0000
130; CHECK-NEXT:    shlq $33, %rax
131; CHECK-NEXT:    retq
132  %xor = shl i64 %x, 33
133  %shl = xor i64 %xor, -562949953421312
134  ret i64 %shl
135}
136
137; PR23098
138define i32 @test12(i32 %x, ptr %y) nounwind {
139; CHECK-LABEL: test12:
140; CHECK:       # %bb.0:
141; CHECK-NEXT:    addl %edi, %edi
142; CHECK-NEXT:    movzbl %dil, %eax
143; CHECK-NEXT:    movl %eax, (%rsi)
144; CHECK-NEXT:    retq
145  %and = shl i32 %x, 1
146  %shl = and i32 %and, 255
147  store i32 %shl, ptr %y
148  ret i32 %shl
149}
150
151define i64 @test13(i64 %x, ptr %y) nounwind {
152; CHECK-LABEL: test13:
153; CHECK:       # %bb.0:
154; CHECK-NEXT:    addl %edi, %edi
155; CHECK-NEXT:    movzbl %dil, %eax
156; CHECK-NEXT:    movq %rax, (%rsi)
157; CHECK-NEXT:    retq
158  %and = shl i64 %x, 1
159  %shl = and i64 %and, 255
160  store i64 %shl, ptr %y
161  ret i64 %shl
162}
163
164define i64 @test14(i64 %x, ptr %y) nounwind {
165; CHECK-LABEL: test14:
166; CHECK:       # %bb.0:
167; CHECK-NEXT:    movq %rdi, %rax
168; CHECK-NEXT:    andl $-16777216, %eax # imm = 0xFF000000
169; CHECK-NEXT:    shlq $8, %rax
170; CHECK-NEXT:    retq
171  %and = shl i64 %x, 8
172  %shl = and i64 %and, 1095216660480
173  ret i64 %shl
174}
175
176define i64 @test15(i64 %x, ptr %y) nounwind {
177; CHECK-LABEL: test15:
178; CHECK:       # %bb.0:
179; CHECK-NEXT:    movl $4278190080, %eax # imm = 0xFF000000
180; CHECK-NEXT:    orq %rdi, %rax
181; CHECK-NEXT:    shlq $8, %rax
182; CHECK-NEXT:    retq
183  %or = shl i64 %x, 8
184  %shl = or i64 %or, 1095216660480
185  ret i64 %shl
186}
187
188define i64 @test16(i64 %x, ptr %y) nounwind {
189; CHECK-LABEL: test16:
190; CHECK:       # %bb.0:
191; CHECK-NEXT:    movl $4278190080, %eax # imm = 0xFF000000
192; CHECK-NEXT:    xorq %rdi, %rax
193; CHECK-NEXT:    shlq $8, %rax
194; CHECK-NEXT:    retq
195  %xor = shl i64 %x, 8
196  %shl = xor i64 %xor, 1095216660480
197  ret i64 %shl
198}
199
200define i32 @test17(i32 %x) nounwind {
201; CHECK-LABEL: test17:
202; CHECK:       # %bb.0:
203; CHECK-NEXT:    movzbl %dil, %eax
204; CHECK-NEXT:    shll $10, %eax
205; CHECK-NEXT:    retq
206  %and = shl i32 %x, 10
207  %shl = and i32 %and, 261120
208  ret i32 %shl
209}
210
211define i64 @test18(i64 %x) nounwind {
212; CHECK-LABEL: test18:
213; CHECK:       # %bb.0:
214; CHECK-NEXT:    movzbl %dil, %eax
215; CHECK-NEXT:    shll $10, %eax
216; CHECK-NEXT:    retq
217  %and = shl i64 %x, 10
218  %shl = and i64 %and, 261120
219  ret i64 %shl
220}
221
222define i32 @test19(i32 %x) nounwind {
223; CHECK-LABEL: test19:
224; CHECK:       # %bb.0:
225; CHECK-NEXT:    movzwl %di, %eax
226; CHECK-NEXT:    shll $10, %eax
227; CHECK-NEXT:    retq
228  %and = shl i32 %x, 10
229  %shl = and i32 %and, 67107840
230  ret i32 %shl
231}
232
233define i64 @test20(i64 %x) nounwind {
234; CHECK-LABEL: test20:
235; CHECK:       # %bb.0:
236; CHECK-NEXT:    movzwl %di, %eax
237; CHECK-NEXT:    shll $10, %eax
238; CHECK-NEXT:    retq
239  %and = shl i64 %x, 10
240  %shl = and i64 %and, 67107840
241  ret i64 %shl
242}
243
244define i64 @test21(i64 %x) nounwind {
245; CHECK-LABEL: test21:
246; CHECK:       # %bb.0:
247; CHECK-NEXT:    movl %edi, %eax
248; CHECK-NEXT:    shlq $10, %rax
249; CHECK-NEXT:    retq
250  %and = shl i64 %x, 10
251  %shl = and i64 %and, 4398046510080
252  ret i64 %shl
253}
254