1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s 3 4define i64 @muladd_demand(i64 %x, i64 %y) { 5; CHECK-LABEL: muladd_demand: 6; CHECK: # %bb.0: 7; CHECK-NEXT: movq %rsi, %rax 8; CHECK-NEXT: shll $6, %edi 9; CHECK-NEXT: subl %edi, %eax 10; CHECK-NEXT: shlq $47, %rax 11; CHECK-NEXT: retq 12 %m = mul i64 %x, 131008 ; 0x0001ffc0 13 %a = add i64 %m, %y 14 %r = shl i64 %a, 47 15 ret i64 %r 16} 17 18define <2 x i64> @muladd_demand_commute(<2 x i64> %x, <2 x i64> %y) { 19; CHECK-LABEL: muladd_demand_commute: 20; CHECK: # %bb.0: 21; CHECK-NEXT: psllq $6, %xmm0 22; CHECK-NEXT: psubq %xmm0, %xmm1 23; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 24; CHECK-NEXT: movdqa %xmm1, %xmm0 25; CHECK-NEXT: retq 26 %m = mul <2 x i64> %x, <i64 131008, i64 131008> 27 %a = add <2 x i64> %y, %m 28 %r = and <2 x i64> %a, <i64 131071, i64 131071> 29 ret <2 x i64> %r 30} 31