1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=i386-unknown-unknown %s -o - | FileCheck --check-prefix=X86 %s 3; RUN: not llc -mtriple=i386-unknown-unknown -relocation-model=pic %s -o /dev/null 2>&1 | FileCheck --check-prefix=X86PIC %s 4 5; Tests come from "clang/test/CodeGen/ms-inline-asm-variables.c" 6; 7; int gVar; 8; void t1() { 9; __asm add ecx, dword ptr gVar[4590 + eax + ecx*4] 10; __asm add dword ptr [gVar + eax + 45 + 23 - 53 + 60 - 2 + ecx*8], ecx 11; __asm add 1 + 1 + 2 + 3[gVar + ecx + ebx], eax 12; 13; gVar = 3; 14; } 15 16@gVar = global i32 0, align 4 17 18; Function Attrs: noinline nounwind optnone uwtable 19define void @t1() #0 { 20; X86-LABEL: t1: 21; X86: # %bb.0: # %entry 22; X86-NEXT: pushl %ebp 23; X86-NEXT: .cfi_def_cfa_offset 8 24; X86-NEXT: .cfi_offset %ebp, -8 25; X86-NEXT: movl %esp, %ebp 26; X86-NEXT: .cfi_def_cfa_register %ebp 27; X86-NEXT: #APP 28; X86-EMPTY: 29; X86-NEXT: addl gVar+4590(%eax,%ecx,4), %ecx 30; X86-NEXT: addl %ecx, gVar+73(%eax,%ecx,8) 31; X86-NEXT: addl %eax, gVar+7(%ecx,%ebx) 32; X86-EMPTY: 33; X86-NEXT: #NO_APP 34; X86-NEXT: movl $3, gVar 35; X86-NEXT: popl %ebp 36; X86-NEXT: .cfi_def_cfa %esp, 4 37; X86-NEXT: retl 38 39; X86PIC: error: Don't use 2 or more regs for mem offset in PIC model 40; X86PIC: error: Don't use 2 or more regs for mem offset in PIC model 41; X86PIC: error: Don't use 2 or more regs for mem offset in PIC model 42 43entry: 44 call void asm sideeffect inteldialect "add ecx, dword ptr ${2:P}[eax + ecx * $$4 + $$4590]\0A\09add dword ptr ${0:P}[eax + ecx * $$8 + $$73], ecx\0A\09add ${1:P}[ecx + ebx + $$7], eax", "=*m,=*m,*m,~{eax},~{ecx},~{flags},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar) #1 45 store i32 3, ptr @gVar, align 4 46 ret void 47} 48 49attributes #0 = { noinline nounwind optnone uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pentium4" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } 50attributes #1 = { nounwind } 51 52!llvm.module.flags = !{!0} 53 54!0 = !{i32 1, !"NumRegisterParameters", i32 0} 55