1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=x86_64-unknown-unknown -relocation-model=pic %s -o - | FileCheck %s 3 4; Tests come from "clang/test/CodeGen/ms-inline-asm-variables.c" 5; int gVar; 6; void t1() { 7; __asm add eax, dword ptr gVar[rax] 8; __asm add dword ptr [rax+gVar], eax 9; __asm add ebx, dword ptr gVar[271 - 82 + 81 + rbx] 10; __asm add dword ptr [rbx + gVar + 828], ebx 11; gVar = 3; 12; } 13; 14; void t2(void) { 15; int lVar; 16; __asm mov eax, dword ptr lVar[rax] 17; __asm mov dword ptr [rax+lVar], eax 18; __asm mov ebx, dword ptr lVar[271 - 82 + 81 + rbx] 19; __asm mov dword ptr [rbx + lVar + 828], ebx 20; __asm mov 5 + 8 + 13 + 21[lVar + rbx], eax 21; lVar = 2; 22; } 23 24@gVar = global i32 0, align 4 25 26; Function Attrs: noinline nounwind optnone uwtable 27define void @t1() #0 { 28; CHECK-LABEL: t1: 29; CHECK: # %bb.0: # %entry 30; CHECK-NEXT: pushq %rbp 31; CHECK-NEXT: .cfi_def_cfa_offset 16 32; CHECK-NEXT: .cfi_offset %rbp, -16 33; CHECK-NEXT: movq %rsp, %rbp 34; CHECK-NEXT: .cfi_def_cfa_register %rbp 35; CHECK-NEXT: pushq %rbx 36; CHECK-NEXT: .cfi_offset %rbx, -24 37; CHECK-NEXT: movq gVar@GOTPCREL(%rip), %rcx 38; CHECK-NEXT: #APP 39; CHECK-EMPTY: 40; CHECK-NEXT: addl (%rcx,%rax), %eax 41; CHECK-NEXT: addl %eax, (%rcx,%rax) 42; CHECK-NEXT: addl 270(%rcx,%rbx), %ebx 43; CHECK-NEXT: addl %ebx, 828(%rcx,%rbx) 44; CHECK-EMPTY: 45; CHECK-NEXT: #NO_APP 46; CHECK-NEXT: movq gVar@GOTPCREL(%rip), %rax 47; CHECK-NEXT: movl $3, (%rax) 48; CHECK-NEXT: popq %rbx 49; CHECK-NEXT: popq %rbp 50; CHECK-NEXT: .cfi_def_cfa %rsp, 8 51; CHECK-NEXT: retq 52entry: 53 call void asm sideeffect inteldialect "add eax, dword ptr $2[rax]\0A\09add dword ptr $0[rax], eax\0A\09add ebx, dword ptr $3[rbx + $$270]\0A\09add dword ptr $1[rbx + $$828], ebx", "=*m,=*m,*m,*m,~{eax},~{ebx},~{flags},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar) #1 54 store i32 3, ptr @gVar, align 4 55 ret void 56} 57 58; Function Attrs: noinline nounwind optnone uwtable 59define void @t2() #0 { 60; CHECK-LABEL: t2: 61; CHECK: # %bb.0: # %entry 62; CHECK-NEXT: pushq %rbp 63; CHECK-NEXT: .cfi_def_cfa_offset 16 64; CHECK-NEXT: .cfi_offset %rbp, -16 65; CHECK-NEXT: movq %rsp, %rbp 66; CHECK-NEXT: .cfi_def_cfa_register %rbp 67; CHECK-NEXT: pushq %rbx 68; CHECK-NEXT: .cfi_offset %rbx, -24 69; CHECK-NEXT: #APP 70; CHECK-EMPTY: 71; CHECK-NEXT: movl -12(%rbp,%rax), %eax 72; CHECK-NEXT: movl %eax, -12(%rbp,%rax) 73; CHECK-NEXT: movl 258(%rbp,%rbx), %ebx 74; CHECK-NEXT: movl %ebx, 816(%rbp,%rbx) 75; CHECK-NEXT: movl %eax, 35(%rbp,%rbx) 76; CHECK-EMPTY: 77; CHECK-NEXT: #NO_APP 78; CHECK-NEXT: movl $2, -12(%rbp) 79; CHECK-NEXT: popq %rbx 80; CHECK-NEXT: popq %rbp 81; CHECK-NEXT: .cfi_def_cfa %rsp, 8 82; CHECK-NEXT: retq 83entry: 84 %lVar = alloca i32, align 4 85 call void asm sideeffect inteldialect "mov eax, dword ptr $3[rax]\0A\09mov dword ptr $0[rax], eax\0A\09mov ebx, dword ptr $4[rbx + $$270]\0A\09mov dword ptr $1[rbx + $$828], ebx\0A\09mov $2[rbx + $$47], eax", "=*m,=*m,=*m,*m,*m,~{eax},~{ebx},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar) #1 86 store i32 2, ptr %lVar, align 4 87 ret void 88} 89 90attributes #0 = { noinline nounwind optnone uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } 91attributes #1 = { nounwind } 92 93!llvm.module.flags = !{!0} 94 95!0 = !{i32 1, !"wchar_size", i32 4} 96