1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512 7 8 9; PR66191 - movmsk msb bit extraction 10 11define i32 @movmsk_eq_v2i64_0(<2 x i64> %v, i32 %a, i32 %b) { 12; SSE-LABEL: movmsk_eq_v2i64_0: 13; SSE: # %bb.0: 14; SSE-NEXT: movl %edi, %eax 15; SSE-NEXT: movmskpd %xmm0, %ecx 16; SSE-NEXT: testb $1, %cl 17; SSE-NEXT: cmovel %esi, %eax 18; SSE-NEXT: retq 19; 20; AVX-LABEL: movmsk_eq_v2i64_0: 21; AVX: # %bb.0: 22; AVX-NEXT: movl %edi, %eax 23; AVX-NEXT: vmovmskpd %xmm0, %ecx 24; AVX-NEXT: testb $1, %cl 25; AVX-NEXT: cmovel %esi, %eax 26; AVX-NEXT: retq 27 %cmp = icmp slt <2 x i64> %v, zeroinitializer 28 %msk = bitcast <2 x i1> %cmp to i2 29 %bit = and i2 %msk, 1 30 %icmp = icmp eq i2 %bit, 0 31 %cond = select i1 %icmp, i32 %b, i32 %a 32 ret i32 %cond 33} 34 35define i32 @movmsk_slt_v2i64_1(<2 x i64> %v, i32 %a, i32 %b) { 36; SSE-LABEL: movmsk_slt_v2i64_1: 37; SSE: # %bb.0: 38; SSE-NEXT: movl %edi, %eax 39; SSE-NEXT: movmskpd %xmm0, %ecx 40; SSE-NEXT: testb $2, %cl 41; SSE-NEXT: cmovel %esi, %eax 42; SSE-NEXT: retq 43; 44; AVX-LABEL: movmsk_slt_v2i64_1: 45; AVX: # %bb.0: 46; AVX-NEXT: movl %edi, %eax 47; AVX-NEXT: vmovmskpd %xmm0, %ecx 48; AVX-NEXT: testb $2, %cl 49; AVX-NEXT: cmovel %esi, %eax 50; AVX-NEXT: retq 51 %cmp = icmp slt <2 x i64> %v, zeroinitializer 52 %msk = bitcast <2 x i1> %cmp to i2 53 %icmp = icmp slt i2 %msk, 0 54 %cond = select i1 %icmp, i32 %a, i32 %b 55 ret i32 %cond 56} 57 58define i32 @movmsk_sgt_v2i64_1(<2 x i64> %v, i32 %a, i32 %b) { 59; SSE-LABEL: movmsk_sgt_v2i64_1: 60; SSE: # %bb.0: 61; SSE-NEXT: movl %edi, %eax 62; SSE-NEXT: movmskpd %xmm0, %ecx 63; SSE-NEXT: testb $2, %cl 64; SSE-NEXT: cmovnel %esi, %eax 65; SSE-NEXT: retq 66; 67; AVX-LABEL: movmsk_sgt_v2i64_1: 68; AVX: # %bb.0: 69; AVX-NEXT: movl %edi, %eax 70; AVX-NEXT: vmovmskpd %xmm0, %ecx 71; AVX-NEXT: testb $2, %cl 72; AVX-NEXT: cmovnel %esi, %eax 73; AVX-NEXT: retq 74 %cmp = icmp slt <2 x i64> %v, zeroinitializer 75 %msk = bitcast <2 x i1> %cmp to i2 76 %icmp = icmp sgt i2 %msk, -1 77 %cond = select i1 %icmp, i32 %a, i32 %b 78 ret i32 %cond 79} 80 81define i32 @movmsk_eq_v4i32_0(<4 x i32> %v, i32 %a, i32 %b) { 82; SSE-LABEL: movmsk_eq_v4i32_0: 83; SSE: # %bb.0: 84; SSE-NEXT: movl %edi, %eax 85; SSE-NEXT: movmskps %xmm0, %ecx 86; SSE-NEXT: testb $1, %cl 87; SSE-NEXT: cmovel %esi, %eax 88; SSE-NEXT: retq 89; 90; AVX-LABEL: movmsk_eq_v4i32_0: 91; AVX: # %bb.0: 92; AVX-NEXT: movl %edi, %eax 93; AVX-NEXT: vmovmskps %xmm0, %ecx 94; AVX-NEXT: testb $1, %cl 95; AVX-NEXT: cmovel %esi, %eax 96; AVX-NEXT: retq 97 %cmp = icmp slt <4 x i32> %v, zeroinitializer 98 %msk = bitcast <4 x i1> %cmp to i4 99 %bit = and i4 %msk, 1 100 %icmp = icmp eq i4 %bit, 0 101 %cond = select i1 %icmp, i32 %b, i32 %a 102 ret i32 %cond 103} 104 105define i32 @movmsk_slt_v4i32_3(<4 x i32> %v, i32 %a, i32 %b) { 106; SSE-LABEL: movmsk_slt_v4i32_3: 107; SSE: # %bb.0: 108; SSE-NEXT: movl %edi, %eax 109; SSE-NEXT: movmskps %xmm0, %ecx 110; SSE-NEXT: testb $8, %cl 111; SSE-NEXT: cmovel %esi, %eax 112; SSE-NEXT: retq 113; 114; AVX-LABEL: movmsk_slt_v4i32_3: 115; AVX: # %bb.0: 116; AVX-NEXT: movl %edi, %eax 117; AVX-NEXT: vmovmskps %xmm0, %ecx 118; AVX-NEXT: testb $8, %cl 119; AVX-NEXT: cmovel %esi, %eax 120; AVX-NEXT: retq 121 %cmp = icmp slt <4 x i32> %v, zeroinitializer 122 %msk = bitcast <4 x i1> %cmp to i4 123 %icmp = icmp slt i4 %msk, 0 124 %cond = select i1 %icmp, i32 %a, i32 %b 125 ret i32 %cond 126} 127 128define i32 @movmsk_sgt_v4i32_3(<4 x i32> %v, i32 %a, i32 %b) { 129; SSE-LABEL: movmsk_sgt_v4i32_3: 130; SSE: # %bb.0: 131; SSE-NEXT: movl %edi, %eax 132; SSE-NEXT: movmskps %xmm0, %ecx 133; SSE-NEXT: testb $8, %cl 134; SSE-NEXT: cmovnel %esi, %eax 135; SSE-NEXT: retq 136; 137; AVX-LABEL: movmsk_sgt_v4i32_3: 138; AVX: # %bb.0: 139; AVX-NEXT: movl %edi, %eax 140; AVX-NEXT: vmovmskps %xmm0, %ecx 141; AVX-NEXT: testb $8, %cl 142; AVX-NEXT: cmovnel %esi, %eax 143; AVX-NEXT: retq 144 %cmp = icmp slt <4 x i32> %v, zeroinitializer 145 %msk = bitcast <4 x i1> %cmp to i4 146 %icmp = icmp sgt i4 %msk, -1 147 %cond = select i1 %icmp, i32 %a, i32 %b 148 ret i32 %cond 149} 150 151define i32 @movmsk_eq_v16i8_0(<16 x i8> %v, i32 %a, i32 %b) { 152; SSE-LABEL: movmsk_eq_v16i8_0: 153; SSE: # %bb.0: 154; SSE-NEXT: movl %edi, %eax 155; SSE-NEXT: pmovmskb %xmm0, %ecx 156; SSE-NEXT: testb $1, %cl 157; SSE-NEXT: cmovel %esi, %eax 158; SSE-NEXT: retq 159; 160; AVX-LABEL: movmsk_eq_v16i8_0: 161; AVX: # %bb.0: 162; AVX-NEXT: movl %edi, %eax 163; AVX-NEXT: vpmovmskb %xmm0, %ecx 164; AVX-NEXT: testb $1, %cl 165; AVX-NEXT: cmovel %esi, %eax 166; AVX-NEXT: retq 167 %cmp = icmp slt <16 x i8> %v, zeroinitializer 168 %msk = bitcast <16 x i1> %cmp to i16 169 %bit = and i16 %msk, 1 170 %icmp = icmp eq i16 %bit, 0 171 %cond = select i1 %icmp, i32 %b, i32 %a 172 ret i32 %cond 173} 174 175define i32 @movmsk_slt_v16i8_15(<16 x i8> %v, i32 %a, i32 %b) { 176; SSE-LABEL: movmsk_slt_v16i8_15: 177; SSE: # %bb.0: 178; SSE-NEXT: movl %edi, %eax 179; SSE-NEXT: pmovmskb %xmm0, %ecx 180; SSE-NEXT: testw %cx, %cx 181; SSE-NEXT: cmovnsl %esi, %eax 182; SSE-NEXT: retq 183; 184; AVX-LABEL: movmsk_slt_v16i8_15: 185; AVX: # %bb.0: 186; AVX-NEXT: movl %edi, %eax 187; AVX-NEXT: vpmovmskb %xmm0, %ecx 188; AVX-NEXT: testw %cx, %cx 189; AVX-NEXT: cmovnsl %esi, %eax 190; AVX-NEXT: retq 191 %cmp = icmp slt <16 x i8> %v, zeroinitializer 192 %msk = bitcast <16 x i1> %cmp to i16 193 %icmp = icmp slt i16 %msk, 0 194 %cond = select i1 %icmp, i32 %a, i32 %b 195 ret i32 %cond 196} 197 198define i32 @movmsk_sgt_v16i8_15(<16 x i8> %v, i32 %a, i32 %b) { 199; SSE-LABEL: movmsk_sgt_v16i8_15: 200; SSE: # %bb.0: 201; SSE-NEXT: movl %edi, %eax 202; SSE-NEXT: pmovmskb %xmm0, %ecx 203; SSE-NEXT: testw %cx, %cx 204; SSE-NEXT: cmovsl %esi, %eax 205; SSE-NEXT: retq 206; 207; AVX-LABEL: movmsk_sgt_v16i8_15: 208; AVX: # %bb.0: 209; AVX-NEXT: movl %edi, %eax 210; AVX-NEXT: vpmovmskb %xmm0, %ecx 211; AVX-NEXT: testw %cx, %cx 212; AVX-NEXT: cmovsl %esi, %eax 213; AVX-NEXT: retq 214 %cmp = icmp slt <16 x i8> %v, zeroinitializer 215 %msk = bitcast <16 x i1> %cmp to i16 216 %icmp = icmp sgt i16 %msk, -1 217 %cond = select i1 %icmp, i32 %a, i32 %b 218 ret i32 %cond 219} 220 221define i32 @movmsk_eq_v4i64_0(<4 x i64> %v, i32 %a, i32 %b) { 222; SSE-LABEL: movmsk_eq_v4i64_0: 223; SSE: # %bb.0: 224; SSE-NEXT: movl %edi, %eax 225; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 226; SSE-NEXT: movmskps %xmm0, %ecx 227; SSE-NEXT: testb $1, %cl 228; SSE-NEXT: cmovel %esi, %eax 229; SSE-NEXT: retq 230; 231; AVX-LABEL: movmsk_eq_v4i64_0: 232; AVX: # %bb.0: 233; AVX-NEXT: movl %edi, %eax 234; AVX-NEXT: vmovmskpd %xmm0, %ecx 235; AVX-NEXT: testb $1, %cl 236; AVX-NEXT: cmovel %esi, %eax 237; AVX-NEXT: vzeroupper 238; AVX-NEXT: retq 239 %cmp = icmp slt <4 x i64> %v, zeroinitializer 240 %msk = bitcast <4 x i1> %cmp to i4 241 %bit = and i4 %msk, 1 242 %icmp = icmp eq i4 %bit, 0 243 %cond = select i1 %icmp, i32 %b, i32 %a 244 ret i32 %cond 245} 246 247define i32 @movmsk_slt_v4i64_3(<4 x i64> %v, i32 %a, i32 %b) { 248; SSE-LABEL: movmsk_slt_v4i64_3: 249; SSE: # %bb.0: 250; SSE-NEXT: movl %edi, %eax 251; SSE-NEXT: movmskps %xmm1, %ecx 252; SSE-NEXT: testb $8, %cl 253; SSE-NEXT: cmovel %esi, %eax 254; SSE-NEXT: retq 255; 256; AVX-LABEL: movmsk_slt_v4i64_3: 257; AVX: # %bb.0: 258; AVX-NEXT: movl %edi, %eax 259; AVX-NEXT: vmovmskpd %ymm0, %ecx 260; AVX-NEXT: testb $8, %cl 261; AVX-NEXT: cmovel %esi, %eax 262; AVX-NEXT: vzeroupper 263; AVX-NEXT: retq 264 %cmp = icmp slt <4 x i64> %v, zeroinitializer 265 %msk = bitcast <4 x i1> %cmp to i4 266 %icmp = icmp slt i4 %msk, 0 267 %cond = select i1 %icmp, i32 %a, i32 %b 268 ret i32 %cond 269} 270 271define i32 @movmsk_sgt_v4i64_3(<4 x i64> %v, i32 %a, i32 %b) { 272; SSE-LABEL: movmsk_sgt_v4i64_3: 273; SSE: # %bb.0: 274; SSE-NEXT: movl %edi, %eax 275; SSE-NEXT: movmskps %xmm1, %ecx 276; SSE-NEXT: testb $8, %cl 277; SSE-NEXT: cmovnel %esi, %eax 278; SSE-NEXT: retq 279; 280; AVX-LABEL: movmsk_sgt_v4i64_3: 281; AVX: # %bb.0: 282; AVX-NEXT: movl %edi, %eax 283; AVX-NEXT: vmovmskpd %ymm0, %ecx 284; AVX-NEXT: testb $8, %cl 285; AVX-NEXT: cmovnel %esi, %eax 286; AVX-NEXT: vzeroupper 287; AVX-NEXT: retq 288 %cmp = icmp slt <4 x i64> %v, zeroinitializer 289 %msk = bitcast <4 x i1> %cmp to i4 290 %icmp = icmp sgt i4 %msk, -1 291 %cond = select i1 %icmp, i32 %a, i32 %b 292 ret i32 %cond 293} 294 295define i32 @movmsk_eq_v8i32_0(<8 x i32> %v, i32 %a, i32 %b) { 296; SSE-LABEL: movmsk_eq_v8i32_0: 297; SSE: # %bb.0: 298; SSE-NEXT: movl %edi, %eax 299; SSE-NEXT: packssdw %xmm0, %xmm0 300; SSE-NEXT: packsswb %xmm0, %xmm0 301; SSE-NEXT: pmovmskb %xmm0, %ecx 302; SSE-NEXT: testb $1, %cl 303; SSE-NEXT: cmovel %esi, %eax 304; SSE-NEXT: retq 305; 306; AVX-LABEL: movmsk_eq_v8i32_0: 307; AVX: # %bb.0: 308; AVX-NEXT: movl %edi, %eax 309; AVX-NEXT: vmovmskps %xmm0, %ecx 310; AVX-NEXT: testb $1, %cl 311; AVX-NEXT: cmovel %esi, %eax 312; AVX-NEXT: vzeroupper 313; AVX-NEXT: retq 314 %cmp = icmp slt <8 x i32> %v, zeroinitializer 315 %msk = bitcast <8 x i1> %cmp to i8 316 %bit = and i8 %msk, 1 317 %icmp = icmp eq i8 %bit, 0 318 %cond = select i1 %icmp, i32 %b, i32 %a 319 ret i32 %cond 320} 321 322define i32 @movmsk_eq_v8i32_3(<8 x i32> %v, i32 %a, i32 %b) { 323; SSE-LABEL: movmsk_eq_v8i32_3: 324; SSE: # %bb.0: 325; SSE-NEXT: movl %edi, %eax 326; SSE-NEXT: packssdw %xmm0, %xmm0 327; SSE-NEXT: packsswb %xmm0, %xmm0 328; SSE-NEXT: pmovmskb %xmm0, %ecx 329; SSE-NEXT: testb $8, %cl 330; SSE-NEXT: cmovel %esi, %eax 331; SSE-NEXT: retq 332; 333; AVX-LABEL: movmsk_eq_v8i32_3: 334; AVX: # %bb.0: 335; AVX-NEXT: movl %edi, %eax 336; AVX-NEXT: vmovmskps %xmm0, %ecx 337; AVX-NEXT: testb $8, %cl 338; AVX-NEXT: cmovel %esi, %eax 339; AVX-NEXT: vzeroupper 340; AVX-NEXT: retq 341 %cmp = icmp slt <8 x i32> %v, zeroinitializer 342 %msk = bitcast <8 x i1> %cmp to i8 343 %bit = and i8 %msk, 8 344 %icmp = icmp eq i8 %bit, 0 345 %cond = select i1 %icmp, i32 %b, i32 %a 346 ret i32 %cond 347} 348 349define i32 @movmsk_slt_v8i32_7(<8 x i32> %v, i32 %a, i32 %b) { 350; SSE-LABEL: movmsk_slt_v8i32_7: 351; SSE: # %bb.0: 352; SSE-NEXT: movl %edi, %eax 353; SSE-NEXT: packssdw %xmm1, %xmm0 354; SSE-NEXT: packsswb %xmm0, %xmm0 355; SSE-NEXT: pmovmskb %xmm0, %ecx 356; SSE-NEXT: testb %cl, %cl 357; SSE-NEXT: cmovnsl %esi, %eax 358; SSE-NEXT: retq 359; 360; AVX-LABEL: movmsk_slt_v8i32_7: 361; AVX: # %bb.0: 362; AVX-NEXT: movl %edi, %eax 363; AVX-NEXT: vmovmskps %ymm0, %ecx 364; AVX-NEXT: testb %cl, %cl 365; AVX-NEXT: cmovnsl %esi, %eax 366; AVX-NEXT: vzeroupper 367; AVX-NEXT: retq 368 %cmp = icmp slt <8 x i32> %v, zeroinitializer 369 %msk = bitcast <8 x i1> %cmp to i8 370 %icmp = icmp slt i8 %msk, 0 371 %cond = select i1 %icmp, i32 %a, i32 %b 372 ret i32 %cond 373} 374 375define i32 @movmsk_sgt_v8i32_7(<8 x i32> %v, i32 %a, i32 %b) { 376; SSE-LABEL: movmsk_sgt_v8i32_7: 377; SSE: # %bb.0: 378; SSE-NEXT: movl %edi, %eax 379; SSE-NEXT: packssdw %xmm1, %xmm0 380; SSE-NEXT: packsswb %xmm0, %xmm0 381; SSE-NEXT: pmovmskb %xmm0, %ecx 382; SSE-NEXT: testb %cl, %cl 383; SSE-NEXT: cmovsl %esi, %eax 384; SSE-NEXT: retq 385; 386; AVX-LABEL: movmsk_sgt_v8i32_7: 387; AVX: # %bb.0: 388; AVX-NEXT: movl %edi, %eax 389; AVX-NEXT: vmovmskps %ymm0, %ecx 390; AVX-NEXT: testb %cl, %cl 391; AVX-NEXT: cmovsl %esi, %eax 392; AVX-NEXT: vzeroupper 393; AVX-NEXT: retq 394 %cmp = icmp slt <8 x i32> %v, zeroinitializer 395 %msk = bitcast <8 x i1> %cmp to i8 396 %icmp = icmp sgt i8 %msk, -1 397 %cond = select i1 %icmp, i32 %a, i32 %b 398 ret i32 %cond 399} 400 401define i32 @movmsk_eq_v32i8_0(<32 x i8> %v, i32 %a, i32 %b) { 402; SSE-LABEL: movmsk_eq_v32i8_0: 403; SSE: # %bb.0: 404; SSE-NEXT: movl %edi, %eax 405; SSE-NEXT: pmovmskb %xmm0, %ecx 406; SSE-NEXT: testb $1, %cl 407; SSE-NEXT: cmovel %esi, %eax 408; SSE-NEXT: retq 409; 410; AVX-LABEL: movmsk_eq_v32i8_0: 411; AVX: # %bb.0: 412; AVX-NEXT: movl %edi, %eax 413; AVX-NEXT: vpmovmskb %xmm0, %ecx 414; AVX-NEXT: testb $1, %cl 415; AVX-NEXT: cmovel %esi, %eax 416; AVX-NEXT: vzeroupper 417; AVX-NEXT: retq 418 %cmp = icmp slt <32 x i8> %v, zeroinitializer 419 %msk = bitcast <32 x i1> %cmp to i32 420 %bit = and i32 %msk, 1 421 %icmp = icmp eq i32 %bit, 0 422 %cond = select i1 %icmp, i32 %b, i32 %a 423 ret i32 %cond 424} 425 426define i32 @movmsk_eq_v32i8_30(<32 x i8> %v, i32 %a, i32 %b) { 427; SSE-LABEL: movmsk_eq_v32i8_30: 428; SSE: # %bb.0: 429; SSE-NEXT: movl %edi, %eax 430; SSE-NEXT: pmovmskb %xmm1, %ecx 431; SSE-NEXT: shll $16, %ecx 432; SSE-NEXT: testl $1073741824, %ecx # imm = 0x40000000 433; SSE-NEXT: cmovel %esi, %eax 434; SSE-NEXT: retq 435; 436; AVX1-LABEL: movmsk_eq_v32i8_30: 437; AVX1: # %bb.0: 438; AVX1-NEXT: movl %edi, %eax 439; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 440; AVX1-NEXT: vpmovmskb %xmm0, %ecx 441; AVX1-NEXT: shll $16, %ecx 442; AVX1-NEXT: testl $1073741824, %ecx # imm = 0x40000000 443; AVX1-NEXT: cmovel %esi, %eax 444; AVX1-NEXT: vzeroupper 445; AVX1-NEXT: retq 446; 447; AVX2-LABEL: movmsk_eq_v32i8_30: 448; AVX2: # %bb.0: 449; AVX2-NEXT: movl %edi, %eax 450; AVX2-NEXT: vpmovmskb %ymm0, %ecx 451; AVX2-NEXT: testl $1073741824, %ecx # imm = 0x40000000 452; AVX2-NEXT: cmovel %esi, %eax 453; AVX2-NEXT: vzeroupper 454; AVX2-NEXT: retq 455; 456; AVX512-LABEL: movmsk_eq_v32i8_30: 457; AVX512: # %bb.0: 458; AVX512-NEXT: movl %edi, %eax 459; AVX512-NEXT: vpmovmskb %ymm0, %ecx 460; AVX512-NEXT: testl $1073741824, %ecx # imm = 0x40000000 461; AVX512-NEXT: cmovel %esi, %eax 462; AVX512-NEXT: vzeroupper 463; AVX512-NEXT: retq 464 %cmp = icmp slt <32 x i8> %v, zeroinitializer 465 %msk = bitcast <32 x i1> %cmp to i32 466 %bit = and i32 %msk, 1073741824 467 %icmp = icmp eq i32 %bit, 0 468 %cond = select i1 %icmp, i32 %b, i32 %a 469 ret i32 %cond 470} 471 472define i32 @movmsk_slt_v32i8_31(<32 x i8> %v, i32 %a, i32 %b) { 473; SSE-LABEL: movmsk_slt_v32i8_31: 474; SSE: # %bb.0: 475; SSE-NEXT: movl %edi, %eax 476; SSE-NEXT: pmovmskb %xmm1, %ecx 477; SSE-NEXT: testl $32768, %ecx # imm = 0x8000 478; SSE-NEXT: cmovel %esi, %eax 479; SSE-NEXT: retq 480; 481; AVX1-LABEL: movmsk_slt_v32i8_31: 482; AVX1: # %bb.0: 483; AVX1-NEXT: movl %edi, %eax 484; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 485; AVX1-NEXT: vpmovmskb %xmm0, %ecx 486; AVX1-NEXT: testl $32768, %ecx # imm = 0x8000 487; AVX1-NEXT: cmovel %esi, %eax 488; AVX1-NEXT: vzeroupper 489; AVX1-NEXT: retq 490; 491; AVX2-LABEL: movmsk_slt_v32i8_31: 492; AVX2: # %bb.0: 493; AVX2-NEXT: movl %edi, %eax 494; AVX2-NEXT: vpmovmskb %ymm0, %ecx 495; AVX2-NEXT: testl %ecx, %ecx 496; AVX2-NEXT: cmovnsl %esi, %eax 497; AVX2-NEXT: vzeroupper 498; AVX2-NEXT: retq 499; 500; AVX512-LABEL: movmsk_slt_v32i8_31: 501; AVX512: # %bb.0: 502; AVX512-NEXT: movl %edi, %eax 503; AVX512-NEXT: vpmovmskb %ymm0, %ecx 504; AVX512-NEXT: testl %ecx, %ecx 505; AVX512-NEXT: cmovnsl %esi, %eax 506; AVX512-NEXT: vzeroupper 507; AVX512-NEXT: retq 508 %cmp = icmp slt <32 x i8> %v, zeroinitializer 509 %msk = bitcast <32 x i1> %cmp to i32 510 %icmp = icmp slt i32 %msk, 0 511 %cond = select i1 %icmp, i32 %a, i32 %b 512 ret i32 %cond 513} 514 515define i32 @movmsk_sgt_v32i8_31(<32 x i8> %v, i32 %a, i32 %b) { 516; SSE-LABEL: movmsk_sgt_v32i8_31: 517; SSE: # %bb.0: 518; SSE-NEXT: movl %edi, %eax 519; SSE-NEXT: pmovmskb %xmm1, %ecx 520; SSE-NEXT: testl $32768, %ecx # imm = 0x8000 521; SSE-NEXT: cmovnel %esi, %eax 522; SSE-NEXT: retq 523; 524; AVX1-LABEL: movmsk_sgt_v32i8_31: 525; AVX1: # %bb.0: 526; AVX1-NEXT: movl %edi, %eax 527; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 528; AVX1-NEXT: vpmovmskb %xmm0, %ecx 529; AVX1-NEXT: testl $32768, %ecx # imm = 0x8000 530; AVX1-NEXT: cmovnel %esi, %eax 531; AVX1-NEXT: vzeroupper 532; AVX1-NEXT: retq 533; 534; AVX2-LABEL: movmsk_sgt_v32i8_31: 535; AVX2: # %bb.0: 536; AVX2-NEXT: movl %edi, %eax 537; AVX2-NEXT: vpmovmskb %ymm0, %ecx 538; AVX2-NEXT: testl %ecx, %ecx 539; AVX2-NEXT: cmovsl %esi, %eax 540; AVX2-NEXT: vzeroupper 541; AVX2-NEXT: retq 542; 543; AVX512-LABEL: movmsk_sgt_v32i8_31: 544; AVX512: # %bb.0: 545; AVX512-NEXT: movl %edi, %eax 546; AVX512-NEXT: vpmovmskb %ymm0, %ecx 547; AVX512-NEXT: testl %ecx, %ecx 548; AVX512-NEXT: cmovsl %esi, %eax 549; AVX512-NEXT: vzeroupper 550; AVX512-NEXT: retq 551 %cmp = icmp slt <32 x i8> %v, zeroinitializer 552 %msk = bitcast <32 x i1> %cmp to i32 553 %icmp = icmp sgt i32 %msk, -1 554 %cond = select i1 %icmp, i32 %a, i32 %b 555 ret i32 %cond 556} 557 558;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: 559; AVX1OR2: {{.*}} 560; SSE2: {{.*}} 561; SSE41: {{.*}} 562