1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx | FileCheck %s 3 4;; Verify that the mmx 'y' constraint works with arbitrary IR types. 5define <2 x i32> @test_mmx_asm(<2 x i32> %a) nounwind { 6; CHECK-LABEL: test_mmx_asm: 7; CHECK: # %bb.0: 8; CHECK-NEXT: movdq2q %xmm0, %mm0 9; CHECK-NEXT: #APP 10; CHECK-NEXT: # %mm0 = %mm0 11; CHECK-NEXT: #NO_APP 12; CHECK-NEXT: #APP 13; CHECK-NEXT: # %mm0 = %mm0 14; CHECK-NEXT: #NO_APP 15; CHECK-NEXT: movq2dq %mm0, %xmm0 16; CHECK-NEXT: retq 17 %1 = tail call i64 asm sideeffect "# $0 = $1", "=y,y"(<2 x i32> %a) 18 %2 = tail call <2 x i32> asm sideeffect "# $0 = $1", "=y,y"(i64 %1) 19 ret <2 x i32> %2 20} 21 22;; And same thing with the 'Ym' constraint. 23define <2 x i32> @test_mmx_asm_Ym(<2 x i32> %a) nounwind { 24; CHECK-LABEL: test_mmx_asm_Ym: 25; CHECK: # %bb.0: 26; CHECK-NEXT: movdq2q %xmm0, %mm0 27; CHECK-NEXT: #APP 28; CHECK-NEXT: # %mm0 = %mm0 29; CHECK-NEXT: #NO_APP 30; CHECK-NEXT: #APP 31; CHECK-NEXT: # %mm0 = %mm0 32; CHECK-NEXT: #NO_APP 33; CHECK-NEXT: movq2dq %mm0, %xmm0 34; CHECK-NEXT: retq 35 %1 = tail call i64 asm sideeffect "# $0 = $1", "=^Ym,^Ym"(<2 x i32> %a) 36 %2 = tail call <2 x i32> asm sideeffect "# $0 = $1", "=^Ym,^Ym"(i64 %1) 37 ret <2 x i32> %2 38} 39