xref: /llvm-project/llvm/test/CodeGen/X86/merge-consecutive-stores.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
3
4; Make sure that we are zeroing one memory location at a time using xorl and
5; not both using XMM registers.
6
7define i32 @foo (ptr %so) nounwind uwtable ssp {
8; CHECK-LABEL: foo:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
11; CHECK-NEXT:    movl $0, 28(%eax)
12; CHECK-NEXT:    movl $0, 24(%eax)
13; CHECK-NEXT:    xorl %ecx, %ecx
14; CHECK-NEXT:    cmpl 16(%eax), %ecx
15; CHECK-NEXT:    movl $0, 16(%eax)
16; CHECK-NEXT:    sbbl 20(%eax), %ecx
17; CHECK-NEXT:    movl $0, 20(%eax)
18; CHECK-NEXT:    setl %al
19; CHECK-NEXT:    movzbl %al, %eax
20; CHECK-NEXT:    negl %eax
21; CHECK-NEXT:    retl
22  %used = getelementptr inbounds i64, ptr %so, i32 3
23  store i64 0, ptr %used, align 8
24  %fill = getelementptr inbounds i64, ptr %so, i32 2
25  %L = load i64, ptr %fill, align 8
26  store i64 0, ptr %fill, align 8
27  %cmp28 = icmp sgt i64 %L, 0
28  %R = sext i1 %cmp28 to i32
29  ret i32 %R
30}
31