xref: /llvm-project/llvm/test/CodeGen/X86/memcpy-light-avx.ll (revision d7043e8c41bb74a31c9790616c1536596814567b)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell -mattr=prefer-128-bit | FileCheck %s
3; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=znver1 -mattr=prefer-128-bit | FileCheck %s
4; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx2,+prefer-128-bit,+allow-light-256-bit | FileCheck %s
5; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx2,+prefer-128-bit,-allow-light-256-bit | FileCheck %s --check-prefixes=NO256
6
7declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind
8
9define void @test1(ptr %a, ptr %b) nounwind {
10; CHECK-LABEL: test1:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    vmovups (%rsi), %ymm0
13; CHECK-NEXT:    vmovups %ymm0, (%rdi)
14; CHECK-NEXT:    vzeroupper
15; CHECK-NEXT:    retq
16;
17; NO256-LABEL: test1:
18; NO256:       # %bb.0:
19; NO256-NEXT:    vmovups (%rsi), %xmm0
20; NO256-NEXT:    vmovups 16(%rsi), %xmm1
21; NO256-NEXT:    vmovups %xmm1, 16(%rdi)
22; NO256-NEXT:    vmovups %xmm0, (%rdi)
23; NO256-NEXT:    retq
24  tail call void @llvm.memcpy.p0.p0.i64(ptr %a, ptr %b, i64 32, i1 0 )
25  ret void
26}
27