xref: /llvm-project/llvm/test/CodeGen/X86/load-local-v4i5.ll (revision 69d5a038b90d3616a5c22d4e0e682aad4679758d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
3@0 = internal unnamed_addr constant [4 x i5] [i5 2, i5 0, i5 2, i5 -1], align 1
4
5; Function Attrs: nobuiltin nounwind
6define void @_start() {
7; CHECK-LABEL: _start:
8; CHECK:       # %bb.0: # %Entry
9; CHECK-NEXT:    movl __unnamed_1(%rip), %eax
10; CHECK-NEXT:    movl %eax, -12(%rsp)
11; CHECK-NEXT:    movzbl -9(%rsp), %ecx
12; CHECK-NEXT:    movzbl -10(%rsp), %edx
13; CHECK-NEXT:    movzbl -11(%rsp), %esi
14; CHECK-NEXT:    movzbl %cl, %edi
15; CHECK-NEXT:    shrb %cl
16; CHECK-NEXT:    movb %cl, -2(%rsp)
17; CHECK-NEXT:    andl $31, %eax
18; CHECK-NEXT:    andl $31, %esi
19; CHECK-NEXT:    shll $5, %esi
20; CHECK-NEXT:    orl %eax, %esi
21; CHECK-NEXT:    andl $31, %edx
22; CHECK-NEXT:    shll $10, %edx
23; CHECK-NEXT:    orl %esi, %edx
24; CHECK-NEXT:    movl %edi, %eax
25; CHECK-NEXT:    shll $15, %eax
26; CHECK-NEXT:    orl %edx, %eax
27; CHECK-NEXT:    movw %ax, -4(%rsp)
28; CHECK-NEXT:    movb %dil, -5(%rsp)
29; CHECK-NEXT:    cmpb $31, %dil
30; CHECK-NEXT:    je .LBB0_2
31; CHECK-NEXT:  # %bb.1: # %Then
32; CHECK-NEXT:    int3
33; CHECK-NEXT:  .LBB0_2: # %EndIf
34; CHECK-NEXT:    retq
35Entry:
36  %x = alloca [4 x i5], align 1
37  %y = alloca <4 x i5>, align 4
38  %z = alloca i5, align 1
39  call void @llvm.memcpy.p0.p0.i64(ptr align 1 %x, ptr align 1 @0, i64 4, i1 false)
40  %0 = load i5, ptr %x
41  %1 = insertelement <4 x i5> undef, i5 %0, i32 0
42  %2 = getelementptr inbounds [4 x i5], ptr %x, i64 0, i64 1
43  %3 = load i5, ptr %2
44  %4 = insertelement <4 x i5> %1, i5 %3, i32 1
45  %5 = getelementptr inbounds [4 x i5], ptr %x, i64 0, i64 2
46  %6 = load i5, ptr %5
47  %7 = insertelement <4 x i5> %4, i5 %6, i32 2
48  %8 = getelementptr inbounds [4 x i5], ptr %x, i64 0, i64 3
49  %9 = load i5, ptr %8
50  %10 = insertelement <4 x i5> %7, i5 %9, i32 3
51  store <4 x i5> %10, ptr %y, align 4
52  %11 = load <4 x i5>, ptr %y
53  %12 = extractelement <4 x i5> %11, i32 3
54  store i5 %12, ptr %z, align 1
55  %13 = load i5, ptr %z, align 1
56  %14 = icmp ne i5 %13, -1
57  br i1 %14, label %Then, label %Else
58
59Then:                                             ; preds = %Entry
60  call void @llvm.debugtrap()
61  br label %EndIf
62
63Else:                                             ; preds = %Entry
64  br label %EndIf
65
66EndIf:                                            ; preds = %Else, %Then
67  ret void
68}
69
70; Function Attrs: argmemonly nounwind willreturn
71declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg)
72
73; Function Attrs: nounwind
74declare void @llvm.debugtrap()
75