xref: /llvm-project/llvm/test/CodeGen/X86/llvm.asin.ll (revision 0b58f34c98e4715c3c920820d79e53e8d99c1b59) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
3
4define half @use_asinf16(half %a) nounwind {
5; CHECK-LABEL: use_asinf16:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    pushq %rax
8; CHECK-NEXT:    callq __extendhfsf2@PLT
9; CHECK-NEXT:    callq asinf@PLT
10; CHECK-NEXT:    callq __truncsfhf2@PLT
11; CHECK-NEXT:    popq %rax
12; CHECK-NEXT:    retq
13  %x = call half @llvm.asin.f16(half %a)
14  ret half %x
15}
16
17define float @use_asinf32(float %a) nounwind {
18; CHECK-LABEL: use_asinf32:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    jmp asinf@PLT # TAILCALL
21  %x = call float @llvm.asin.f32(float %a)
22  ret float %x
23}
24
25define double @use_asinf64(double %a) nounwind {
26; CHECK-LABEL: use_asinf64:
27; CHECK:       # %bb.0:
28; CHECK-NEXT:    jmp asin@PLT # TAILCALL
29  %x = call double @llvm.asin.f64(double %a)
30  ret double %x
31}
32
33define x86_fp80 @use_asinf80(x86_fp80 %a) nounwind {
34; CHECK-LABEL: use_asinf80:
35; CHECK:       # %bb.0:
36; CHECK-NEXT:    subq $24, %rsp
37; CHECK-NEXT:    fldt 32(%rsp)
38; CHECK-NEXT:    fstpt (%rsp)
39; CHECK-NEXT:    callq asinl@PLT
40; CHECK-NEXT:    addq  $24, %rsp
41; CHECK-NEXT:    retq
42  %x = call x86_fp80 @llvm.asin.f80(x86_fp80 %a)
43  ret x86_fp80 %x
44}
45
46define fp128 @use_asinfp128(fp128 %a) nounwind {
47; CHECK-LABEL: use_asinfp128:
48; CHECK:       # %bb.0:
49; CHECK-NEXT:    jmp  asinf128@PLT # TAILCALL
50  %x = call fp128 @llvm.asin.f128(fp128 %a)
51  ret fp128 %x
52}
53
54define ppc_fp128 @use_asinppc_fp128(ppc_fp128 %a) nounwind {
55; CHECK-LABEL: use_asinppc_fp128:
56; CHECK:       # %bb.0:
57; CHECK-NEXT:    pushq %rax
58; CHECK-NEXT:    callq asinl@PLT
59; CHECK-NEXT:    popq %rax
60; CHECK-NEXT:    retq
61  %x = call ppc_fp128 @llvm.asin.ppcf128(ppc_fp128 %a)
62  ret ppc_fp128 %x
63}
64
65declare half @llvm.asin.f16(half)
66declare float @llvm.asin.f32(float)
67declare double @llvm.asin.f64(double)
68declare x86_fp80 @llvm.asin.f80(x86_fp80)
69declare fp128 @llvm.asin.f128(fp128)
70declare ppc_fp128 @llvm.asin.ppcf128(ppc_fp128)
71