xref: /llvm-project/llvm/test/CodeGen/X86/legalize-types-remapid.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; RUN: llc -mtriple=i386 -mcpu=generic -O0 -o /dev/null %s
2
3@c = global i32 0
4@d = global <2 x i64> zeroinitializer
5
6define void @test() {
7bb1:
8  %t0 = load <2 x i64>, ptr @d
9  %t0.i0 = extractelement <2 x i64> %t0, i32 0
10  %t0.i0.cast = bitcast i64 %t0.i0 to <2 x i32>
11  %t0.i0.cast.i0 = extractelement <2 x i32> %t0.i0.cast, i32 0
12  store volatile i32 %t0.i0.cast.i0, ptr @c
13  %t0.i0.cast.i1 = extractelement <2 x i32> %t0.i0.cast, i32 1
14  store volatile i32 %t0.i0.cast.i1, ptr @c
15  ret void
16}
17
18define void @PR45049() local_unnamed_addr {
19so_basic:
20  %a0 = load i1, ptr undef, align 1
21  %a1 = select i1 %a0, i542 4374501449566023848745004454235242730706338861786424872851541212819905998398751846447026354046107648, i542 0 ; constant is: i542 1 << 331
22  %a00 = zext i1 %a0 to i542
23  %a11 = shl i542 %a00, 331
24  %a2 = shl i542 %a00, 330
25  %a4 = or i542 %a1, %a2
26  %a05 = zext i1 %a0 to i488
27  %a55 = shl i488 %a05, 111
28  store i542 %a4, ptr undef, align 8
29  store i488 %a55, ptr undef, align 8
30  ret void
31}
32