1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes X64,SDAG-X64 3; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes X64,GISEL-X64 4; RUN: llc < %s -mattr=+avx512f -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes AVX512,SDAG-AVX512 5; RUN: llc < %s -global-isel -global-isel-abort=1 -mattr=+avx512f -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes AVX512,GISEL-AVX512 6 7define double @test_ui64_to_double(i64 %x) { 8; SDAG-X64-LABEL: test_ui64_to_double: 9; SDAG-X64: # %bb.0: # %entry 10; SDAG-X64-NEXT: movq %rdi, %xmm1 11; SDAG-X64-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1] 12; SDAG-X64-NEXT: subpd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 13; SDAG-X64-NEXT: movapd %xmm1, %xmm0 14; SDAG-X64-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1] 15; SDAG-X64-NEXT: addsd %xmm1, %xmm0 16; SDAG-X64-NEXT: retq 17; 18; GISEL-X64-LABEL: test_ui64_to_double: 19; GISEL-X64: # %bb.0: # %entry 20; GISEL-X64-NEXT: movabsq $4841369599423283200, %rax # imm = 0x4330000000000000 21; GISEL-X64-NEXT: movabsq $4985484787499139072, %rcx # imm = 0x4530000000000000 22; GISEL-X64-NEXT: movsd {{.*#+}} xmm0 = [1.9342813118337666E+25,0.0E+0] 23; GISEL-X64-NEXT: movl $4294967295, %edx # imm = 0xFFFFFFFF 24; GISEL-X64-NEXT: andq %rdi, %rdx 25; GISEL-X64-NEXT: orq %rax, %rdx 26; GISEL-X64-NEXT: shrq $32, %rdi 27; GISEL-X64-NEXT: orq %rdi, %rcx 28; GISEL-X64-NEXT: movq %rcx, %xmm1 29; GISEL-X64-NEXT: subsd %xmm0, %xmm1 30; GISEL-X64-NEXT: movq %rdx, %xmm0 31; GISEL-X64-NEXT: addsd %xmm1, %xmm0 32; GISEL-X64-NEXT: retq 33; 34; AVX512-LABEL: test_ui64_to_double: 35; AVX512: # %bb.0: # %entry 36; AVX512-NEXT: vcvtusi2sd %rdi, %xmm0, %xmm0 37; AVX512-NEXT: retq 38entry: 39 %conv = uitofp i64 %x to double 40 ret double %conv 41} 42 43define double @test_ui32_to_double(i32 %x) { 44; X64-LABEL: test_ui32_to_double: 45; X64: # %bb.0: # %entry 46; X64-NEXT: movl %edi, %eax 47; X64-NEXT: cvtsi2sd %rax, %xmm0 48; X64-NEXT: retq 49; 50; AVX512-LABEL: test_ui32_to_double: 51; AVX512: # %bb.0: # %entry 52; AVX512-NEXT: vcvtusi2sd %edi, %xmm0, %xmm0 53; AVX512-NEXT: retq 54entry: 55 %conv = uitofp i32 %x to double 56 ret double %conv 57} 58 59define double @test_ui16_to_double(i16 zeroext %x) { 60; X64-LABEL: test_ui16_to_double: 61; X64: # %bb.0: # %entry 62; X64-NEXT: cvtsi2sd %edi, %xmm0 63; X64-NEXT: retq 64; 65; SDAG-AVX512-LABEL: test_ui16_to_double: 66; SDAG-AVX512: # %bb.0: # %entry 67; SDAG-AVX512-NEXT: vcvtsi2sd %edi, %xmm0, %xmm0 68; SDAG-AVX512-NEXT: retq 69; 70; GISEL-AVX512-LABEL: test_ui16_to_double: 71; GISEL-AVX512: # %bb.0: # %entry 72; GISEL-AVX512-NEXT: vcvtusi2sd %edi, %xmm0, %xmm0 73; GISEL-AVX512-NEXT: retq 74entry: 75 %conv = uitofp i16 %x to double 76 ret double %conv 77} 78 79define double @test_ui8_to_double(i8 zeroext %x) { 80; X64-LABEL: test_ui8_to_double: 81; X64: # %bb.0: # %entry 82; X64-NEXT: cvtsi2sd %edi, %xmm0 83; X64-NEXT: retq 84; 85; SDAG-AVX512-LABEL: test_ui8_to_double: 86; SDAG-AVX512: # %bb.0: # %entry 87; SDAG-AVX512-NEXT: vcvtsi2sd %edi, %xmm0, %xmm0 88; SDAG-AVX512-NEXT: retq 89; 90; GISEL-AVX512-LABEL: test_ui8_to_double: 91; GISEL-AVX512: # %bb.0: # %entry 92; GISEL-AVX512-NEXT: vcvtusi2sd %edi, %xmm0, %xmm0 93; GISEL-AVX512-NEXT: retq 94entry: 95 %conv = uitofp i8 %x to double 96 ret double %conv 97} 98 99define float @test_ui64_to_float(i64 %x) { 100; SDAG-X64-LABEL: test_ui64_to_float: 101; SDAG-X64: # %bb.0: # %entry 102; SDAG-X64-NEXT: testq %rdi, %rdi 103; SDAG-X64-NEXT: js .LBB4_1 104; SDAG-X64-NEXT: # %bb.2: # %entry 105; SDAG-X64-NEXT: cvtsi2ss %rdi, %xmm0 106; SDAG-X64-NEXT: retq 107; SDAG-X64-NEXT: .LBB4_1: 108; SDAG-X64-NEXT: movq %rdi, %rax 109; SDAG-X64-NEXT: shrq %rax 110; SDAG-X64-NEXT: andl $1, %edi 111; SDAG-X64-NEXT: orq %rax, %rdi 112; SDAG-X64-NEXT: cvtsi2ss %rdi, %xmm0 113; SDAG-X64-NEXT: addss %xmm0, %xmm0 114; SDAG-X64-NEXT: retq 115; 116; GISEL-X64-LABEL: test_ui64_to_float: 117; GISEL-X64: # %bb.0: # %entry 118; GISEL-X64-NEXT: cvtsi2ss %rdi, %xmm0 119; GISEL-X64-NEXT: movq %rdi, %rax 120; GISEL-X64-NEXT: shrq %rax 121; GISEL-X64-NEXT: movq %rdi, %rcx 122; GISEL-X64-NEXT: andq $1, %rcx 123; GISEL-X64-NEXT: orq %rax, %rcx 124; GISEL-X64-NEXT: cvtsi2ss %rcx, %xmm1 125; GISEL-X64-NEXT: addss %xmm1, %xmm1 126; GISEL-X64-NEXT: xorl %eax, %eax 127; GISEL-X64-NEXT: cmpq $0, %rdi 128; GISEL-X64-NEXT: setl %al 129; GISEL-X64-NEXT: andl $1, %eax 130; GISEL-X64-NEXT: movd %xmm1, %eax 131; GISEL-X64-NEXT: movd %xmm0, %ecx 132; GISEL-X64-NEXT: cmovnel %eax, %ecx 133; GISEL-X64-NEXT: movd %ecx, %xmm0 134; GISEL-X64-NEXT: retq 135; 136; AVX512-LABEL: test_ui64_to_float: 137; AVX512: # %bb.0: # %entry 138; AVX512-NEXT: vcvtusi2ss %rdi, %xmm0, %xmm0 139; AVX512-NEXT: retq 140entry: 141 %conv = uitofp i64 %x to float 142 ret float %conv 143} 144 145define float @test_ui32_to_float(i32 %x) { 146; X64-LABEL: test_ui32_to_float: 147; X64: # %bb.0: # %entry 148; X64-NEXT: movl %edi, %eax 149; X64-NEXT: cvtsi2ss %rax, %xmm0 150; X64-NEXT: retq 151; 152; AVX512-LABEL: test_ui32_to_float: 153; AVX512: # %bb.0: # %entry 154; AVX512-NEXT: vcvtusi2ss %edi, %xmm0, %xmm0 155; AVX512-NEXT: retq 156entry: 157 %conv = uitofp i32 %x to float 158 ret float %conv 159} 160 161define float @test_ui16_to_float(i16 zeroext %x) { 162; X64-LABEL: test_ui16_to_float: 163; X64: # %bb.0: # %entry 164; X64-NEXT: cvtsi2ss %edi, %xmm0 165; X64-NEXT: retq 166; 167; SDAG-AVX512-LABEL: test_ui16_to_float: 168; SDAG-AVX512: # %bb.0: # %entry 169; SDAG-AVX512-NEXT: vcvtsi2ss %edi, %xmm0, %xmm0 170; SDAG-AVX512-NEXT: retq 171; 172; GISEL-AVX512-LABEL: test_ui16_to_float: 173; GISEL-AVX512: # %bb.0: # %entry 174; GISEL-AVX512-NEXT: vcvtusi2ss %edi, %xmm0, %xmm0 175; GISEL-AVX512-NEXT: retq 176entry: 177 %conv = uitofp i16 %x to float 178 ret float %conv 179} 180 181define float @test_ui8_to_float(i8 zeroext %x) { 182; X64-LABEL: test_ui8_to_float: 183; X64: # %bb.0: # %entry 184; X64-NEXT: cvtsi2ss %edi, %xmm0 185; X64-NEXT: retq 186; 187; SDAG-AVX512-LABEL: test_ui8_to_float: 188; SDAG-AVX512: # %bb.0: # %entry 189; SDAG-AVX512-NEXT: vcvtsi2ss %edi, %xmm0, %xmm0 190; SDAG-AVX512-NEXT: retq 191; 192; GISEL-AVX512-LABEL: test_ui8_to_float: 193; GISEL-AVX512: # %bb.0: # %entry 194; GISEL-AVX512-NEXT: vcvtusi2ss %edi, %xmm0, %xmm0 195; GISEL-AVX512-NEXT: retq 196entry: 197 %conv = uitofp i8 %x to float 198 ret float %conv 199} 200 201define double @test_si64_to_double(i64 %x) { 202; X64-LABEL: test_si64_to_double: 203; X64: # %bb.0: # %entry 204; X64-NEXT: cvtsi2sd %rdi, %xmm0 205; X64-NEXT: retq 206; 207; AVX512-LABEL: test_si64_to_double: 208; AVX512: # %bb.0: # %entry 209; AVX512-NEXT: vcvtsi2sd %rdi, %xmm0, %xmm0 210; AVX512-NEXT: retq 211entry: 212 %conv = sitofp i64 %x to double 213 ret double %conv 214} 215 216define double @test_si32_to_double(i32 %x) { 217; X64-LABEL: test_si32_to_double: 218; X64: # %bb.0: # %entry 219; X64-NEXT: cvtsi2sd %edi, %xmm0 220; X64-NEXT: retq 221; 222; AVX512-LABEL: test_si32_to_double: 223; AVX512: # %bb.0: # %entry 224; AVX512-NEXT: vcvtsi2sd %edi, %xmm0, %xmm0 225; AVX512-NEXT: retq 226entry: 227 %conv = sitofp i32 %x to double 228 ret double %conv 229} 230 231define double @test_si16_to_double(i16 signext %x) { 232; X64-LABEL: test_si16_to_double: 233; X64: # %bb.0: # %entry 234; X64-NEXT: cvtsi2sd %edi, %xmm0 235; X64-NEXT: retq 236; 237; AVX512-LABEL: test_si16_to_double: 238; AVX512: # %bb.0: # %entry 239; AVX512-NEXT: vcvtsi2sd %edi, %xmm0, %xmm0 240; AVX512-NEXT: retq 241entry: 242 %conv = sitofp i16 %x to double 243 ret double %conv 244} 245 246define double @test_si8_to_double(i8 signext %x) { 247; X64-LABEL: test_si8_to_double: 248; X64: # %bb.0: # %entry 249; X64-NEXT: cvtsi2sd %edi, %xmm0 250; X64-NEXT: retq 251; 252; AVX512-LABEL: test_si8_to_double: 253; AVX512: # %bb.0: # %entry 254; AVX512-NEXT: vcvtsi2sd %edi, %xmm0, %xmm0 255; AVX512-NEXT: retq 256entry: 257 %conv = sitofp i8 %x to double 258 ret double %conv 259} 260 261define double @test_si31_to_double(i31 %x) { 262; X64-LABEL: test_si31_to_double: 263; X64: # %bb.0: # %entry 264; X64-NEXT: addl %edi, %edi 265; X64-NEXT: sarl %edi 266; X64-NEXT: cvtsi2sd %edi, %xmm0 267; X64-NEXT: retq 268; 269; AVX512-LABEL: test_si31_to_double: 270; AVX512: # %bb.0: # %entry 271; AVX512-NEXT: addl %edi, %edi 272; AVX512-NEXT: sarl %edi 273; AVX512-NEXT: vcvtsi2sd %edi, %xmm0, %xmm0 274; AVX512-NEXT: retq 275entry: 276 %conv = sitofp i31 %x to double 277 ret double %conv 278} 279 280define double @test_si33_to_double(i33 %x) { 281; X64-LABEL: test_si33_to_double: 282; X64: # %bb.0: # %entry 283; X64-NEXT: shlq $31, %rdi 284; X64-NEXT: sarq $31, %rdi 285; X64-NEXT: cvtsi2sd %rdi, %xmm0 286; X64-NEXT: retq 287; 288; AVX512-LABEL: test_si33_to_double: 289; AVX512: # %bb.0: # %entry 290; AVX512-NEXT: shlq $31, %rdi 291; AVX512-NEXT: sarq $31, %rdi 292; AVX512-NEXT: vcvtsi2sd %rdi, %xmm0, %xmm0 293; AVX512-NEXT: retq 294entry: 295 %conv = sitofp i33 %x to double 296 ret double %conv 297} 298 299define float @test_si64_to_float(i64 %x) { 300; X64-LABEL: test_si64_to_float: 301; X64: # %bb.0: # %entry 302; X64-NEXT: cvtsi2ss %rdi, %xmm0 303; X64-NEXT: retq 304; 305; AVX512-LABEL: test_si64_to_float: 306; AVX512: # %bb.0: # %entry 307; AVX512-NEXT: vcvtsi2ss %rdi, %xmm0, %xmm0 308; AVX512-NEXT: retq 309entry: 310 %conv = sitofp i64 %x to float 311 ret float %conv 312} 313 314define float @test_si32_to_float(i32 %x) { 315; X64-LABEL: test_si32_to_float: 316; X64: # %bb.0: # %entry 317; X64-NEXT: cvtsi2ss %edi, %xmm0 318; X64-NEXT: retq 319; 320; AVX512-LABEL: test_si32_to_float: 321; AVX512: # %bb.0: # %entry 322; AVX512-NEXT: vcvtsi2ss %edi, %xmm0, %xmm0 323; AVX512-NEXT: retq 324entry: 325 %conv = sitofp i32 %x to float 326 ret float %conv 327} 328 329define float @test_si16_to_float(i16 signext %x) { 330; X64-LABEL: test_si16_to_float: 331; X64: # %bb.0: # %entry 332; X64-NEXT: cvtsi2ss %edi, %xmm0 333; X64-NEXT: retq 334; 335; AVX512-LABEL: test_si16_to_float: 336; AVX512: # %bb.0: # %entry 337; AVX512-NEXT: vcvtsi2ss %edi, %xmm0, %xmm0 338; AVX512-NEXT: retq 339entry: 340 %conv = sitofp i16 %x to float 341 ret float %conv 342} 343 344define float @test_si8_to_float(i8 signext %x) { 345; X64-LABEL: test_si8_to_float: 346; X64: # %bb.0: # %entry 347; X64-NEXT: cvtsi2ss %edi, %xmm0 348; X64-NEXT: retq 349; 350; AVX512-LABEL: test_si8_to_float: 351; AVX512: # %bb.0: # %entry 352; AVX512-NEXT: vcvtsi2ss %edi, %xmm0, %xmm0 353; AVX512-NEXT: retq 354entry: 355 %conv = sitofp i8 %x to float 356 ret float %conv 357} 358 359define float @test_si31_to_float(i31 %x) { 360; X64-LABEL: test_si31_to_float: 361; X64: # %bb.0: # %entry 362; X64-NEXT: addl %edi, %edi 363; X64-NEXT: sarl %edi 364; X64-NEXT: cvtsi2ss %edi, %xmm0 365; X64-NEXT: retq 366; 367; AVX512-LABEL: test_si31_to_float: 368; AVX512: # %bb.0: # %entry 369; AVX512-NEXT: addl %edi, %edi 370; AVX512-NEXT: sarl %edi 371; AVX512-NEXT: vcvtsi2ss %edi, %xmm0, %xmm0 372; AVX512-NEXT: retq 373entry: 374 %conv = sitofp i31 %x to float 375 ret float %conv 376} 377 378define float @test_si33_to_float(i33 %x) { 379; X64-LABEL: test_si33_to_float: 380; X64: # %bb.0: # %entry 381; X64-NEXT: shlq $31, %rdi 382; X64-NEXT: sarq $31, %rdi 383; X64-NEXT: cvtsi2ss %rdi, %xmm0 384; X64-NEXT: retq 385; 386; AVX512-LABEL: test_si33_to_float: 387; AVX512: # %bb.0: # %entry 388; AVX512-NEXT: shlq $31, %rdi 389; AVX512-NEXT: sarq $31, %rdi 390; AVX512-NEXT: vcvtsi2ss %rdi, %xmm0, %xmm0 391; AVX512-NEXT: retq 392entry: 393 %conv = sitofp i33 %x to float 394 ret float %conv 395} 396