xref: /llvm-project/llvm/test/CodeGen/X86/ins_subreg_coalesce-1.ll (revision 69d5a038b90d3616a5c22d4e0e682aad4679758d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-- -mattr=-bmi | FileCheck %s
3
4; TODO: This might not be testing the original issue anymore? Should the movl still be removed?
5define fastcc i32 @t() nounwind  {
6; CHECK-LABEL: t:
7; CHECK:       # %bb.0: # %entry
8; CHECK-NEXT:    movzwl 0, %eax
9; CHECK-NEXT:    movl %eax, %ecx
10; CHECK-NEXT:    orl $2, %ecx
11; CHECK-NEXT:    movw %cx, 0
12; CHECK-NEXT:    shrl $3, %eax
13; CHECK-NEXT:    andl $1, %eax
14; CHECK-NEXT:    retl
15entry:
16	br i1 false, label %UnifiedReturnBlock, label %bb4
17bb4:		; preds = %entry
18	br i1 false, label %bb17, label %bb22
19bb17:		; preds = %bb4
20	ret i32 1
21bb22:		; preds = %bb4
22	br i1 true, label %walkExprTree.exit, label %bb4.i
23bb4.i:		; preds = %bb22
24	ret i32 0
25walkExprTree.exit:		; preds = %bb22
26	%tmp83 = load i16, ptr null, align 4		; <i16> [#uses=1]
27	%tmp84 = or i16 %tmp83, 2		; <i16> [#uses=2]
28	store i16 %tmp84, ptr null, align 4
29	%tmp98993 = zext i16 %tmp84 to i32		; <i32> [#uses=1]
30	%tmp1004 = lshr i32 %tmp98993, 3		; <i32> [#uses=1]
31	%tmp100.lobit5 = and i32 %tmp1004, 1		; <i32> [#uses=1]
32	ret i32 %tmp100.lobit5
33UnifiedReturnBlock:		; preds = %entry
34	ret i32 0
35}
36