xref: /llvm-project/llvm/test/CodeGen/X86/i686-win-shrink-wrapping.ll (revision 4e2b4f97a09500fb6ceb4f077c492fac056a6a0a)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc %s -o - -enable-shrink-wrap=true | FileCheck --check-prefix=SHRINK-WRAP %s
3; RUN: llc %s -o - -enable-shrink-wrap=false | FileCheck --check-prefix=NO-SHRINK-WRAP %s
4target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
5target triple = "i686-pc-windows-msvc18.0.0"
6
7%struct.S = type { i32 }
8
9; Check that we do not use a basic block that has EFLAGS as live-in
10; if we need to realign the stack.
11define x86_thiscallcc void @stackRealignment(ptr %this) {
12; SHRINK-WRAP-LABEL: stackRealignment:
13; SHRINK-WRAP:       # %bb.0: # %entry
14; SHRINK-WRAP-NEXT:    movl (%ecx), %eax
15; SHRINK-WRAP-NEXT:    cmpl $33, %eax
16; SHRINK-WRAP-NEXT:    movl $42, %edx
17; SHRINK-WRAP-NEXT:    jge LBB0_2
18; SHRINK-WRAP-NEXT:  # %bb.1: # %entry
19; SHRINK-WRAP-NEXT:    movl $128, %edx
20; SHRINK-WRAP-NEXT:  LBB0_2: # %entry
21; SHRINK-WRAP-NEXT:    pushl %ebp
22; SHRINK-WRAP-NEXT:    movl %esp, %ebp
23; SHRINK-WRAP-NEXT:    andl $-8, %esp
24; SHRINK-WRAP-NEXT:    subl $16, %esp
25; SHRINK-WRAP-NEXT:    movl %edx, {{[0-9]+}}(%esp)
26; SHRINK-WRAP-NEXT:    cmpl $32, %eax
27; SHRINK-WRAP-NEXT:    jl LBB0_4
28; SHRINK-WRAP-NEXT:  # %bb.3: # %if.end
29; SHRINK-WRAP-NEXT:    leal {{[0-9]+}}(%esp), %eax
30; SHRINK-WRAP-NEXT:    leal {{[0-9]+}}(%esp), %edx
31; SHRINK-WRAP-NEXT:    pushl %eax
32; SHRINK-WRAP-NEXT:    pushl %edx
33; SHRINK-WRAP-NEXT:    calll _bar
34; SHRINK-WRAP-NEXT:  LBB0_4: # %cleanup
35; SHRINK-WRAP-NEXT:    movl %ebp, %esp
36; SHRINK-WRAP-NEXT:    popl %ebp
37; SHRINK-WRAP-NEXT:    retl
38;
39; NO-SHRINK-WRAP-LABEL: stackRealignment:
40; NO-SHRINK-WRAP:       # %bb.0: # %entry
41; NO-SHRINK-WRAP-NEXT:    pushl %ebp
42; NO-SHRINK-WRAP-NEXT:    movl %esp, %ebp
43; NO-SHRINK-WRAP-NEXT:    andl $-8, %esp
44; NO-SHRINK-WRAP-NEXT:    subl $16, %esp
45; NO-SHRINK-WRAP-NEXT:    movl (%ecx), %eax
46; NO-SHRINK-WRAP-NEXT:    cmpl $33, %eax
47; NO-SHRINK-WRAP-NEXT:    movl $42, %edx
48; NO-SHRINK-WRAP-NEXT:    jge LBB0_2
49; NO-SHRINK-WRAP-NEXT:  # %bb.1: # %entry
50; NO-SHRINK-WRAP-NEXT:    movl $128, %edx
51; NO-SHRINK-WRAP-NEXT:  LBB0_2: # %entry
52; NO-SHRINK-WRAP-NEXT:    movl %edx, {{[0-9]+}}(%esp)
53; NO-SHRINK-WRAP-NEXT:    cmpl $32, %eax
54; NO-SHRINK-WRAP-NEXT:    jl LBB0_4
55; NO-SHRINK-WRAP-NEXT:  # %bb.3: # %if.end
56; NO-SHRINK-WRAP-NEXT:    leal {{[0-9]+}}(%esp), %eax
57; NO-SHRINK-WRAP-NEXT:    leal {{[0-9]+}}(%esp), %edx
58; NO-SHRINK-WRAP-NEXT:    pushl %eax
59; NO-SHRINK-WRAP-NEXT:    pushl %edx
60; NO-SHRINK-WRAP-NEXT:    calll _bar
61; NO-SHRINK-WRAP-NEXT:  LBB0_4: # %cleanup
62; NO-SHRINK-WRAP-NEXT:    movl %ebp, %esp
63; NO-SHRINK-WRAP-NEXT:    popl %ebp
64; NO-SHRINK-WRAP-NEXT:    retl
65entry:
66  %data = alloca [1 x i32], align 4
67  %d = alloca double, align 8
68  %tmp1 = load i32, ptr %this, align 4
69  %cmp = icmp sgt i32 %tmp1, 32
70  %cond = select i1 %cmp, i32 42, i32 128
71  store i32 %cond, ptr %data, align 4
72  %cmp3 = icmp slt i32 %tmp1, 32
73  br i1 %cmp3, label %cleanup, label %if.end
74
75if.end:                                           ; preds = %entry
76  call x86_thiscallcc void @bar(ptr nonnull %this, ptr %data, ptr nonnull %d)
77  br label %cleanup
78
79cleanup:                                          ; preds = %if.end, %entry
80  ret void
81}
82
83; Function Attrs: optsize
84declare x86_thiscallcc void @bar(ptr, ptr, ptr)
85