1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=X86 3; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64 4 5; Make sure none of these crash, and that the power-of-two transformations 6; trigger correctly. 7 8define i128 @test1(i128 %x) nounwind { 9; X86-LABEL: test1: 10; X86: # %bb.0: 11; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 12; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx 13; X86-NEXT: movl {{[0-9]+}}(%esp), %edx 14; X86-NEXT: shrdl $2, %edx, %ecx 15; X86-NEXT: shrl $2, %edx 16; X86-NEXT: movl %edx, 4(%eax) 17; X86-NEXT: movl %ecx, (%eax) 18; X86-NEXT: movl $0, 12(%eax) 19; X86-NEXT: movl $0, 8(%eax) 20; X86-NEXT: retl $4 21; 22; X64-LABEL: test1: 23; X64: # %bb.0: 24; X64-NEXT: movq %rsi, %rax 25; X64-NEXT: shrq $2, %rax 26; X64-NEXT: xorl %edx, %edx 27; X64-NEXT: retq 28 %tmp = udiv i128 %x, 73786976294838206464 29 ret i128 %tmp 30} 31 32define i128 @test2(i128 %x) nounwind { 33; X86-LABEL: test2: 34; X86 doesn't have __divti3, so the urem is expanded into a loop. 35; X86: udiv-do-while 36; 37; X64-LABEL: test2: 38; X64: # %bb.0: 39; X64-NEXT: pushq %rax 40; X64-NEXT: xorl %edx, %edx 41; X64-NEXT: movq $-4, %rcx 42; X64-NEXT: callq __udivti3@PLT 43; X64-NEXT: popq %rcx 44; X64-NEXT: retq 45 %tmp = udiv i128 %x, -73786976294838206464 46 ret i128 %tmp 47} 48 49define i128 @test3(i128 %x) nounwind { 50; X86-LABEL: test3: 51; X86 doesn't have __divti3, so the urem is expanded into a loop. 52; X86: udiv-do-while 53; 54; X64-LABEL: test3: 55; X64: # %bb.0: 56; X64-NEXT: pushq %rax 57; X64-NEXT: movq $-3, %rdx 58; X64-NEXT: movq $-5, %rcx 59; X64-NEXT: callq __udivti3@PLT 60; X64-NEXT: popq %rcx 61; X64-NEXT: retq 62 %tmp = udiv i128 %x, -73786976294838206467 63 ret i128 %tmp 64} 65