1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=X86 3; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64 4 5; Make sure none of these crash, and that the power-of-two transformations 6; trigger correctly. 7 8define i128 @test1(i128 %x) nounwind { 9; X86-LABEL: test1: 10; X86: # %bb.0: 11; X86-NEXT: pushl %edi 12; X86-NEXT: pushl %esi 13; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 14; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx 15; X86-NEXT: movl %ecx, %esi 16; X86-NEXT: sarl $31, %esi 17; X86-NEXT: movl %esi, %edx 18; X86-NEXT: shrl $30, %edx 19; X86-NEXT: movl {{[0-9]+}}(%esp), %edi 20; X86-NEXT: addl %esi, %edi 21; X86-NEXT: adcl {{[0-9]+}}(%esp), %esi 22; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx 23; X86-NEXT: adcl $0, %ecx 24; X86-NEXT: shrdl $2, %ecx, %edx 25; X86-NEXT: movl %ecx, %esi 26; X86-NEXT: sarl $2, %esi 27; X86-NEXT: sarl $31, %ecx 28; X86-NEXT: movl %ecx, 12(%eax) 29; X86-NEXT: movl %ecx, 8(%eax) 30; X86-NEXT: movl %esi, 4(%eax) 31; X86-NEXT: movl %edx, (%eax) 32; X86-NEXT: popl %esi 33; X86-NEXT: popl %edi 34; X86-NEXT: retl $4 35; 36; X64-LABEL: test1: 37; X64: # %bb.0: 38; X64-NEXT: movq %rsi, %rax 39; X64-NEXT: sarq $63, %rax 40; X64-NEXT: movq %rax, %rdx 41; X64-NEXT: shrq $62, %rdx 42; X64-NEXT: addq %rdi, %rax 43; X64-NEXT: adcq %rsi, %rdx 44; X64-NEXT: movq %rdx, %rax 45; X64-NEXT: sarq $2, %rax 46; X64-NEXT: sarq $63, %rdx 47; X64-NEXT: retq 48 %tmp = sdiv i128 %x, 73786976294838206464 49 ret i128 %tmp 50} 51 52define i128 @test2(i128 %x) nounwind { 53; X86-LABEL: test2: 54; X86: # %bb.0: 55; X86-NEXT: pushl %ebx 56; X86-NEXT: pushl %edi 57; X86-NEXT: pushl %esi 58; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 59; X86-NEXT: movl {{[0-9]+}}(%esp), %edx 60; X86-NEXT: movl %edx, %esi 61; X86-NEXT: sarl $31, %esi 62; X86-NEXT: movl %esi, %ecx 63; X86-NEXT: shrl $30, %ecx 64; X86-NEXT: movl {{[0-9]+}}(%esp), %edi 65; X86-NEXT: addl %esi, %edi 66; X86-NEXT: adcl {{[0-9]+}}(%esp), %esi 67; X86-NEXT: adcl {{[0-9]+}}(%esp), %ecx 68; X86-NEXT: adcl $0, %edx 69; X86-NEXT: shrdl $2, %edx, %ecx 70; X86-NEXT: movl %edx, %esi 71; X86-NEXT: sarl $31, %esi 72; X86-NEXT: sarl $2, %edx 73; X86-NEXT: xorl %edi, %edi 74; X86-NEXT: negl %ecx 75; X86-NEXT: movl $0, %ebx 76; X86-NEXT: sbbl %edx, %ebx 77; X86-NEXT: movl $0, %edx 78; X86-NEXT: sbbl %esi, %edx 79; X86-NEXT: sbbl %esi, %edi 80; X86-NEXT: movl %ecx, (%eax) 81; X86-NEXT: movl %ebx, 4(%eax) 82; X86-NEXT: movl %edx, 8(%eax) 83; X86-NEXT: movl %edi, 12(%eax) 84; X86-NEXT: popl %esi 85; X86-NEXT: popl %edi 86; X86-NEXT: popl %ebx 87; X86-NEXT: retl $4 88; 89; X64-LABEL: test2: 90; X64: # %bb.0: 91; X64-NEXT: movq %rsi, %rcx 92; X64-NEXT: sarq $63, %rcx 93; X64-NEXT: movq %rcx, %rax 94; X64-NEXT: shrq $62, %rax 95; X64-NEXT: addq %rdi, %rcx 96; X64-NEXT: adcq %rsi, %rax 97; X64-NEXT: movq %rax, %rcx 98; X64-NEXT: sarq $63, %rcx 99; X64-NEXT: sarq $2, %rax 100; X64-NEXT: xorl %edx, %edx 101; X64-NEXT: negq %rax 102; X64-NEXT: sbbq %rcx, %rdx 103; X64-NEXT: retq 104 %tmp = sdiv i128 %x, -73786976294838206464 105 ret i128 %tmp 106} 107 108define i128 @test3(i128 %x) nounwind { 109; X86-LABEL: test3: 110; X86 doesn't have __divti3, so the urem is expanded into a loop. 111; X86: udiv-do-while 112; 113; X64-LABEL: test3: 114; X64: # %bb.0: 115; X64-NEXT: pushq %rax 116; X64-NEXT: movq $-3, %rdx 117; X64-NEXT: movq $-5, %rcx 118; X64-NEXT: callq __divti3@PLT 119; X64-NEXT: popq %rcx 120; X64-NEXT: retq 121 %tmp = sdiv i128 %x, -73786976294838206467 122 ret i128 %tmp 123} 124