1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -relocation-model=static -code-model=medium -mtriple=x86_64-linux-gnu -mcpu=opteron | FileCheck %s 3 4; Check the HiPE calling convention works (x86-64) 5 6define void @zap(i64 %a, i64 %b) nounwind { 7; CHECK-LABEL: zap: 8; CHECK: # %bb.0: # %entry 9; CHECK-NEXT: pushq %rbp 10; CHECK-NEXT: pushq %r15 11; CHECK-NEXT: pushq %r14 12; CHECK-NEXT: pushq %r13 13; CHECK-NEXT: pushq %r12 14; CHECK-NEXT: pushq %rbx 15; CHECK-NEXT: movq %rsi, %rdx 16; CHECK-NEXT: movl $8, %ecx 17; CHECK-NEXT: movl $9, %r8d 18; CHECK-NEXT: movq %rdi, %rsi 19; CHECK-NEXT: callq addfour@PLT 20; CHECK-NEXT: movl $1, %edx 21; CHECK-NEXT: movl $2, %ecx 22; CHECK-NEXT: movl $3, %r8d 23; CHECK-NEXT: movq %rax, %r9 24; CHECK-NEXT: callq foo@PLT 25; CHECK-NEXT: popq %rbx 26; CHECK-NEXT: popq %r12 27; CHECK-NEXT: popq %r13 28; CHECK-NEXT: popq %r14 29; CHECK-NEXT: popq %r15 30; CHECK-NEXT: popq %rbp 31; CHECK-NEXT: retq 32entry: 33 %0 = call cc 11 {i64, i64, i64} @addfour(i64 undef, i64 undef, i64 %a, i64 %b, i64 8, i64 9) 34 %res = extractvalue {i64, i64, i64} %0, 2 35 36 tail call void @foo(i64 undef, i64 undef, i64 1, i64 2, i64 3, i64 %res) nounwind 37 ret void 38} 39 40define cc 11 {i64, i64, i64} @addfour(i64 %hp, i64 %p, i64 %x, i64 %y, i64 %z, i64 %w) nounwind { 41; CHECK-LABEL: addfour: 42; CHECK: # %bb.0: # %entry 43; CHECK-NEXT: addq %rsi, %rdx 44; CHECK-NEXT: leaq (%rcx,%r8), %rax 45; CHECK-NEXT: addq %rdx, %rax 46; CHECK-NEXT: retq 47entry: 48 %0 = add i64 %x, %y 49 %1 = add i64 %0, %z 50 %2 = add i64 %1, %w 51 52 %res = insertvalue {i64, i64, i64} undef, i64 %2, 2 53 ret {i64, i64, i64} %res 54} 55 56define cc 11 void @foo(i64 %hp, i64 %p, i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3) nounwind { 57; CHECK-LABEL: foo: 58; CHECK: # %bb.0: # %entry 59; CHECK-NEXT: subq $48, %rsp 60; CHECK-NEXT: movq %r15, {{[0-9]+}}(%rsp) 61; CHECK-NEXT: movq %rbp, {{[0-9]+}}(%rsp) 62; CHECK-NEXT: movq %rsi, {{[0-9]+}}(%rsp) 63; CHECK-NEXT: movq %rdx, {{[0-9]+}}(%rsp) 64; CHECK-NEXT: movq %rcx, {{[0-9]+}}(%rsp) 65; CHECK-NEXT: movq %r8, (%rsp) 66; CHECK-NEXT: addq $48, %rsp 67; CHECK-NEXT: jmp bar@PLT # TAILCALL 68entry: 69 %hp_var = alloca i64 70 %p_var = alloca i64 71 %arg0_var = alloca i64 72 %arg1_var = alloca i64 73 %arg2_var = alloca i64 74 %arg3_var = alloca i64 75 store i64 %hp, ptr %hp_var 76 store i64 %p, ptr %p_var 77 store i64 %arg0, ptr %arg0_var 78 store i64 %arg1, ptr %arg1_var 79 store i64 %arg2, ptr %arg2_var 80 store i64 %arg3, ptr %arg3_var 81 82 ; Loads are reading values just writen from corresponding register and are therefore noops. 83 %0 = load i64, ptr %hp_var 84 %1 = load i64, ptr %p_var 85 %2 = load i64, ptr %arg0_var 86 %3 = load i64, ptr %arg1_var 87 %4 = load i64, ptr %arg2_var 88 %5 = load i64, ptr %arg3_var 89 tail call cc 11 void @bar(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5) nounwind 90 ret void 91} 92 93define cc 11 void @baz() nounwind { 94; CHECK-LABEL: baz: 95; CHECK: # %bb.0: 96; CHECK-NEXT: movq clos@GOTPCREL(%rip), %rax 97; CHECK-NEXT: movl $42, %esi 98; CHECK-NEXT: jmpq *(%rax) # TAILCALL 99 %tmp_clos = load i64, ptr @clos 100 %tmp_clos2 = inttoptr i64 %tmp_clos to ptr 101 tail call cc 11 void %tmp_clos2(i64 undef, i64 undef, i64 42) nounwind 102 ret void 103} 104 105; Sanity-check the tail call sequence. Number of arguments was chosen as to 106; expose a bug where the tail call sequence clobbered the stack. 107define cc 11 { i64, i64, i64 } @tailcaller(i64 %hp, i64 %p) #0 { 108; CHECK-LABEL: tailcaller: 109; CHECK: # %bb.0: 110; CHECK-NEXT: subq $16, %rsp 111; CHECK-NEXT: .cfi_def_cfa_offset 24 112; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax 113; CHECK-NEXT: movq %rax, {{[0-9]+}}(%rsp) 114; CHECK-NEXT: movq $79, {{[0-9]+}}(%rsp) 115; CHECK-NEXT: movl $15, %esi 116; CHECK-NEXT: movl $31, %edx 117; CHECK-NEXT: movl $47, %ecx 118; CHECK-NEXT: movl $63, %r8d 119; CHECK-NEXT: popq %rax 120; CHECK-NEXT: .cfi_def_cfa_offset 16 121; CHECK-NEXT: jmp tailcallee@PLT # TAILCALL 122 %ret = tail call cc11 { i64, i64, i64 } @tailcallee(i64 %hp, i64 %p, i64 15, 123 i64 31, i64 47, i64 63, i64 79) #1 124 ret { i64, i64, i64 } %ret 125} 126 127!hipe.literals = !{ !0, !1, !2 } 128!0 = !{ !"P_NSP_LIMIT", i32 160 } 129!1 = !{ !"X86_LEAF_WORDS", i32 24 } 130!2 = !{ !"AMD64_LEAF_WORDS", i32 24 } 131@clos = external constant i64 132declare cc 11 void @bar(i64, i64, i64, i64, i64, i64) 133declare cc 11 { i64, i64, i64 } @tailcallee(i64, i64, i64, i64, i64, i64, i64) 134!llvm.module.flags = !{!3} 135!3 = !{i32 2, !"override-stack-alignment", i32 8} 136