1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s 3 4define i8 @PR43088(double, double) nounwind { 5; CHECK-LABEL: PR43088: 6; CHECK: # %bb.0: # %start 7; CHECK-NEXT: xorl %ecx, %ecx 8; CHECK-NEXT: ucomisd %xmm1, %xmm0 9; CHECK-NEXT: movl $0, %eax 10; CHECK-NEXT: adcb $1, %al 11; CHECK-NEXT: ucomisd %xmm1, %xmm0 12; CHECK-NEXT: sbbl %ecx, %ecx 13; CHECK-NEXT: ucomisd %xmm0, %xmm1 14; CHECK-NEXT: movzbl %al, %eax 15; CHECK-NEXT: cmovael %ecx, %eax 16; CHECK-NEXT: # kill: def $al killed $al killed $eax 17; CHECK-NEXT: retq 18start: 19 %2 = fcmp ole double %0, %1 20 %3 = fcmp oge double %0, %1 21 %spec.select1.i = select i1 %3, i8 1, i8 2 22 %not..i = xor i1 %3, true 23 %spec.select.i = sext i1 %not..i to i8 24 %_0.0.i = select i1 %2, i8 %spec.select.i, i8 %spec.select1.i 25 ret i8 %_0.0.i 26} 27