1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; Make sure that seldag legalization works correctly for freeze instruction. 3; RUN: llc -mtriple=i386-apple-darwin < %s 2>&1 | FileCheck %s 4 5define i64 @expand(i32 %x) { 6; CHECK-LABEL: expand: 7; CHECK: ## %bb.0: 8; CHECK-NEXT: movl $1280068684, %eax ## imm = 0x4C4C4C4C 9; CHECK-NEXT: movl $1145324612, %edx ## imm = 0x44444444 10; CHECK-NEXT: retl 11 %y1 = freeze i64 1302123111658042420 ; 0x1212121234343434 12 %y2 = freeze i64 6221254864647256184 ; 0x5656565678787878 13 %t2 = xor i64 %y1, %y2 14 ret i64 %t2 15} 16 17 18define <2 x i64> @expand_vec(i32 %x) nounwind { 19; CHECK-LABEL: expand_vec: 20; CHECK: ## %bb.0: 21; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 22; CHECK-NEXT: movl $1145324612, 12(%eax) ## imm = 0x44444444 23; CHECK-NEXT: movl $1145324612, 8(%eax) ## imm = 0x44444444 24; CHECK-NEXT: movl $1145324612, 4(%eax) ## imm = 0x44444444 25; CHECK-NEXT: movl $1280068684, (%eax) ## imm = 0x4C4C4C4C 26; CHECK-NEXT: retl $4 27 ; <0x1212121234343434, 0x101010123232323> 28 %y1 = freeze <2 x i64> <i64 1302123111658042420, i64 72340173410738979> 29 ; <0x5656565678787878, 0x4545454567676767> 30 %y2 = freeze <2 x i64> <i64 6221254864647256184, i64 4991471926399952743> 31 %t2 = xor <2 x i64> %y1, %y2 32 ret <2 x i64> %t2 33} 34 35define i10 @promote() { 36; CHECK-LABEL: promote: 37; CHECK: ## %bb.0: 38; CHECK-NEXT: movw $650, %ax ## imm = 0x28A 39; CHECK-NEXT: retl 40 %a = freeze i10 682 41 %b = freeze i10 992 42 %res = add i10 %a, %b 43 ret i10 %res 44} 45 46define <2 x i10> @promote_vec() { 47; CHECK-LABEL: promote_vec: 48; CHECK: ## %bb.0: 49; CHECK-NEXT: movw $650, %ax ## imm = 0x28A 50; CHECK-NEXT: movw $518, %dx ## imm = 0x206 51; CHECK-NEXT: retl 52 %a = freeze <2 x i10> <i10 682, i10 125> 53 %b = freeze <2 x i10> <i10 992, i10 393> 54 %res = add <2 x i10> %a, %b 55 ret <2 x i10> %res 56} 57