1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s 3 4; rdar://12721174 5; We should not fold movss into pshufd since pshufd expects m128 while movss 6; loads from m32. 7define void @sample_test(ptr %source, ptr %dest) nounwind { 8; CHECK-LABEL: sample_test: 9; CHECK: # %bb.0: # %entry 10; CHECK-NEXT: subq $24, %rsp 11; CHECK-NEXT: movq %rdi, {{[0-9]+}}(%rsp) 12; CHECK-NEXT: movq %rsi, {{[0-9]+}}(%rsp) 13; CHECK-NEXT: movq $0, (%rsp) 14; CHECK-NEXT: xorps %xmm0, %xmm0 15; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1] 16; CHECK-NEXT: movlps %xmm0, (%rsp) 17; CHECK-NEXT: movlps %xmm0, (%rsi) 18; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax 19; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 20; CHECK-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] 21; CHECK-NEXT: callq ext@PLT 22; CHECK-NEXT: addq $24, %rsp 23; CHECK-NEXT: retq 24entry: 25 %source.addr = alloca ptr, align 8 26 %dest.addr = alloca ptr, align 8 27 %tmp = alloca <2 x float>, align 8 28 store ptr %source, ptr %source.addr, align 8 29 store ptr %dest, ptr %dest.addr, align 8 30 store <2 x float> zeroinitializer, ptr %tmp, align 8 31 %0 = load ptr, ptr %source.addr, align 8 32 %1 = load <4 x float>, ptr %0, align 16 33 %2 = extractelement <4 x float> %1, i32 0 34 %3 = load <2 x float>, ptr %tmp, align 8 35 %4 = insertelement <2 x float> %3, float %2, i32 1 36 store <2 x float> %4, ptr %tmp, align 8 37 %5 = load <2 x float>, ptr %tmp, align 8 38 %6 = load ptr, ptr %dest.addr, align 8 39 store <2 x float> %5, ptr %6, align 8 40 %7 = load ptr, ptr %dest.addr, align 8 41 %8 = load <2 x float>, ptr %7, align 8 42 %vecext = extractelement <2 x float> %8, i32 0 43 %9 = load ptr, ptr %dest.addr, align 8 44 %10 = load <2 x float>, ptr %9, align 8 45 %vecext4 = extractelement <2 x float> %10, i32 1 46 call void @ext(float %vecext, float %vecext4) 47 ret void 48} 49declare void @ext(float, float) 50