xref: /llvm-project/llvm/test/CodeGen/X86/float-conv-elim.ll (revision 747c6a0c734e618db8132b503f432d8274cc56b5)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=x86_64-- -mcpu=x86-64 < %s | FileCheck %s
3
4define i32 @u8_f32_s32(i8 %a) {
5; CHECK-LABEL: u8_f32_s32:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    movzbl %dil, %eax
8; CHECK-NEXT:    retq
9  %conv = uitofp i8 %a to float
10  %conv1 = fptosi float %conv to i32
11  ret i32 %conv1
12}
13
14define i32 @s8_f32_s32(i8 %a) {
15; CHECK-LABEL: s8_f32_s32:
16; CHECK:       # %bb.0:
17; CHECK-NEXT:    movsbl %dil, %eax
18; CHECK-NEXT:    retq
19  %conv = sitofp i8 %a to float
20  %conv1 = fptosi float %conv to i32
21  ret i32 %conv1
22}
23
24define zeroext i8 @u8_f32_u8(i8 zeroext %a) {
25; CHECK-LABEL: u8_f32_u8:
26; CHECK:       # %bb.0:
27; CHECK-NEXT:    movl %edi, %eax
28; CHECK-NEXT:    # kill: def $al killed $al killed $eax
29; CHECK-NEXT:    retq
30  %conv = uitofp i8 %a to float
31  %conv1 = fptoui float %conv to i8
32  ret i8 %conv1
33}
34
35define i32 @s32_f32_s24_s32(i32 %a) {
36; CHECK-LABEL: s32_f32_s24_s32:
37; CHECK:       # %bb.0:
38; CHECK-NEXT:    movl %edi, %eax
39; CHECK-NEXT:    shll $8, %eax
40; CHECK-NEXT:    sarl $8, %eax
41; CHECK-NEXT:    retq
42  %f = sitofp i32 %a to float
43  %i = fptosi float %f to i24
44  %r = sext i24 %i to i32
45  ret i32 %r
46}
47
48define i32 @s32_f32_u24_u32(i32 %a) {
49; CHECK-LABEL: s32_f32_u24_u32:
50; CHECK:       # %bb.0:
51; CHECK-NEXT:    movl %edi, %eax
52; CHECK-NEXT:    andl $16777215, %eax # imm = 0xFFFFFF
53; CHECK-NEXT:    retq
54  %f = sitofp i32 %a to float
55  %i = fptoui float %f to i24
56  %r = zext i24 %i to i32
57  ret i32 %r
58}
59
60define i32 @u32_f32_s24_s32(i32 %a) {
61; CHECK-LABEL: u32_f32_s24_s32:
62; CHECK:       # %bb.0:
63; CHECK-NEXT:    movl %edi, %eax
64; CHECK-NEXT:    shll $8, %eax
65; CHECK-NEXT:    sarl $8, %eax
66; CHECK-NEXT:    retq
67  %f = uitofp i32 %a to float
68  %i = fptosi float %f to i24
69  %r = sext i24 %i to i32
70  ret i32 %r
71}
72
73define i32 @u32_f32_u24_u32(i32 %a) {
74; CHECK-LABEL: u32_f32_u24_u32:
75; CHECK:       # %bb.0:
76; CHECK-NEXT:    movl %edi, %eax
77; CHECK-NEXT:    andl $16777215, %eax # imm = 0xFFFFFF
78; CHECK-NEXT:    retq
79  %f = uitofp i32 %a to float
80  %i = fptoui float %f to i24
81  %r = zext i24 %i to i32
82  ret i32 %r
83}
84
85; This requires converting to FP and back.
86
87define i32 @s32_f32_s25_s32(i32 %a) {
88; CHECK-LABEL: s32_f32_s25_s32:
89; CHECK:       # %bb.0:
90; CHECK-NEXT:    cvtsi2ss %edi, %xmm0
91; CHECK-NEXT:    cvttss2si %xmm0, %eax
92; CHECK-NEXT:    retq
93  %f = sitofp i32 %a to float
94  %i = fptosi float %f to i25
95  %r = sext i25 %i to i32
96  ret i32 %r
97}
98
99define i32 @s32_f32_u25_u32(i32 %a) {
100; CHECK-LABEL: s32_f32_u25_u32:
101; CHECK:       # %bb.0:
102; CHECK-NEXT:    cvtsi2ss %edi, %xmm0
103; CHECK-NEXT:    cvttss2si %xmm0, %eax
104; CHECK-NEXT:    retq
105  %f = sitofp i32 %a to float
106  %i = fptoui float %f to i25
107  %r = zext i25 %i to i32
108  ret i32 %r
109}
110
111; TODO: This could avoid converting to FP.
112
113define i32 @u32_f32_s25_s32(i32 %a) {
114; CHECK-LABEL: u32_f32_s25_s32:
115; CHECK:       # %bb.0:
116; CHECK-NEXT:    movl %edi, %eax
117; CHECK-NEXT:    cvtsi2ss %rax, %xmm0
118; CHECK-NEXT:    cvttss2si %xmm0, %eax
119; CHECK-NEXT:    retq
120  %f = uitofp i32 %a to float
121  %i = fptosi float %f to i25
122  %r = sext i25 %i to i32
123  ret i32 %r
124}
125
126define i32 @u32_f32_u25_u32(i32 %a) {
127; CHECK-LABEL: u32_f32_u25_u32:
128; CHECK:       # %bb.0:
129; CHECK-NEXT:    movl %edi, %eax
130; CHECK-NEXT:    cvtsi2ss %rax, %xmm0
131; CHECK-NEXT:    cvttss2si %xmm0, %eax
132; CHECK-NEXT:    retq
133  %f = uitofp i32 %a to float
134  %i = fptoui float %f to i25
135  %r = zext i25 %i to i32
136  ret i32 %r
137}
138