1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 2# RUN: llc -mtriple=x86_64 -run-pass x86-flags-copy-lowering -verify-machineinstrs -o - %s | FileCheck %s 3# Lower various interesting copy patterns of EFLAGS without using LAHF/SAHF. 4 5... 6--- 7name: test_branch 8body: | 9 ; CHECK-LABEL: name: test_branch 10 ; CHECK: bb.0: 11 ; CHECK-NEXT: successors: %bb.1(0x2aaaaaab), %bb.4(0x55555556) 12 ; CHECK-NEXT: liveins: $rdi, $rsi 13 ; CHECK-NEXT: {{ $}} 14 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 15 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 16 ; CHECK-NEXT: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags 17 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags 18 ; CHECK-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 19 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags 20 ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags 21 ; CHECK-NEXT: JCC_1 %bb.1, 5, implicit killed $eflags 22 ; CHECK-NEXT: {{ $}} 23 ; CHECK-NEXT: bb.4: 24 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000) 25 ; CHECK-NEXT: {{ $}} 26 ; CHECK-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags 27 ; CHECK-NEXT: JCC_1 %bb.2, 5, implicit killed $eflags 28 ; CHECK-NEXT: JMP_1 %bb.3 29 ; CHECK-NEXT: {{ $}} 30 ; CHECK-NEXT: bb.1: 31 ; CHECK-NEXT: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 42 32 ; CHECK-NEXT: $eax = COPY [[MOV32ri]] 33 ; CHECK-NEXT: RET 0, $eax 34 ; CHECK-NEXT: {{ $}} 35 ; CHECK-NEXT: bb.2: 36 ; CHECK-NEXT: [[MOV32ri1:%[0-9]+]]:gr32 = MOV32ri 43 37 ; CHECK-NEXT: $eax = COPY [[MOV32ri1]] 38 ; CHECK-NEXT: RET 0, $eax 39 ; CHECK-NEXT: {{ $}} 40 ; CHECK-NEXT: bb.3: 41 ; CHECK-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags 42 ; CHECK-NEXT: $eax = COPY [[MOV32r0_]] 43 ; CHECK-NEXT: RET 0, $eax 44 bb.0: 45 successors: %bb.1, %bb.2, %bb.3 46 liveins: $rdi, $rsi 47 48 %0:gr64 = COPY $rdi 49 %1:gr64 = COPY $rsi 50 CMP64rr %0, %1, implicit-def $eflags 51 %2:gr64 = COPY $eflags 52 53 INLINEASM &nop, 1, 12, implicit-def dead $eflags 54 55 $eflags = COPY %2 56 JCC_1 %bb.1, 7, implicit $eflags 57 JCC_1 %bb.2, 2, implicit $eflags 58 JMP_1 %bb.3 59 60 bb.1: 61 %3:gr32 = MOV32ri 42 62 $eax = COPY %3 63 RET 0, $eax 64 65 bb.2: 66 %4:gr32 = MOV32ri 43 67 $eax = COPY %4 68 RET 0, $eax 69 70 bb.3: 71 %5:gr32 = MOV32r0 implicit-def dead $eflags 72 $eax = COPY %5 73 RET 0, $eax 74 75... 76--- 77name: test_branch_fallthrough 78body: | 79 ; CHECK-LABEL: name: test_branch_fallthrough 80 ; CHECK: bb.0: 81 ; CHECK-NEXT: successors: %bb.4(0x55555556), %bb.2(0x2aaaaaab) 82 ; CHECK-NEXT: liveins: $rdi, $rsi 83 ; CHECK-NEXT: {{ $}} 84 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 85 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 86 ; CHECK-NEXT: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags 87 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags 88 ; CHECK-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 89 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags 90 ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags 91 ; CHECK-NEXT: JCC_1 %bb.2, 5, implicit killed $eflags 92 ; CHECK-NEXT: {{ $}} 93 ; CHECK-NEXT: bb.4: 94 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.3(0x40000000) 95 ; CHECK-NEXT: {{ $}} 96 ; CHECK-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags 97 ; CHECK-NEXT: JCC_1 %bb.3, 5, implicit killed $eflags 98 ; CHECK-NEXT: {{ $}} 99 ; CHECK-NEXT: bb.1: 100 ; CHECK-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags 101 ; CHECK-NEXT: $eax = COPY [[MOV32r0_]] 102 ; CHECK-NEXT: RET 0, $eax 103 ; CHECK-NEXT: {{ $}} 104 ; CHECK-NEXT: bb.2: 105 ; CHECK-NEXT: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 42 106 ; CHECK-NEXT: $eax = COPY [[MOV32ri]] 107 ; CHECK-NEXT: RET 0, $eax 108 ; CHECK-NEXT: {{ $}} 109 ; CHECK-NEXT: bb.3: 110 ; CHECK-NEXT: [[MOV32ri1:%[0-9]+]]:gr32 = MOV32ri 43 111 ; CHECK-NEXT: $eax = COPY [[MOV32ri1]] 112 ; CHECK-NEXT: RET 0, $eax 113 bb.0: 114 successors: %bb.1, %bb.2, %bb.3 115 liveins: $rdi, $rsi 116 117 %0:gr64 = COPY $rdi 118 %1:gr64 = COPY $rsi 119 CMP64rr %0, %1, implicit-def $eflags 120 %2:gr64 = COPY $eflags 121 122 INLINEASM &nop, 1, 12, implicit-def dead $eflags 123 124 $eflags = COPY %2 125 JCC_1 %bb.2, 7, implicit $eflags 126 JCC_1 %bb.3, 2, implicit $eflags 127 128 bb.1: 129 %5:gr32 = MOV32r0 implicit-def dead $eflags 130 $eax = COPY %5 131 RET 0, $eax 132 133 bb.2: 134 %3:gr32 = MOV32ri 42 135 $eax = COPY %3 136 RET 0, $eax 137 138 bb.3: 139 %4:gr32 = MOV32ri 43 140 $eax = COPY %4 141 RET 0, $eax 142 143... 144--- 145name: test_setcc 146body: | 147 bb.0: 148 liveins: $rdi, $rsi 149 150 ; CHECK-LABEL: name: test_setcc 151 ; CHECK: liveins: $rdi, $rsi 152 ; CHECK-NEXT: {{ $}} 153 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 154 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 155 ; CHECK-NEXT: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags 156 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags 157 ; CHECK-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 158 ; CHECK-NEXT: [[SETCCr2:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags 159 ; CHECK-NEXT: [[SETCCr3:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags 160 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags 161 ; CHECK-NEXT: MOV8mr $rsp, 1, $noreg, -16, $noreg, [[SETCCr3]] 162 ; CHECK-NEXT: MOV8mr $rsp, 1, $noreg, -16, $noreg, [[SETCCr]] 163 ; CHECK-NEXT: MOV8mr $rsp, 1, $noreg, -16, $noreg, [[SETCCr1]] 164 ; CHECK-NEXT: MOV8mr $rsp, 1, $noreg, -16, $noreg, [[SETCCr2]] 165 ; CHECK-NEXT: RET 0 166 %0:gr64 = COPY $rdi 167 %1:gr64 = COPY $rsi 168 CMP64rr %0, %1, implicit-def $eflags 169 %2:gr64 = COPY $eflags 170 171 INLINEASM &nop, 1, 12, implicit-def dead $eflags 172 173 $eflags = COPY %2 174 %3:gr8 = SETCCr 7, implicit $eflags 175 %4:gr8 = SETCCr 2, implicit $eflags 176 %5:gr8 = SETCCr 4, implicit $eflags 177 SETCCm $rsp, 1, $noreg, -16, $noreg, 5, implicit killed $eflags 178 MOV8mr $rsp, 1, $noreg, -16, $noreg, killed %3 179 MOV8mr $rsp, 1, $noreg, -16, $noreg, killed %4 180 MOV8mr $rsp, 1, $noreg, -16, $noreg, killed %5 181 182 RET 0 183 184... 185--- 186name: test_cmov 187body: | 188 bb.0: 189 liveins: $rdi, $rsi 190 191 ; CHECK-LABEL: name: test_cmov 192 ; CHECK: liveins: $rdi, $rsi 193 ; CHECK-NEXT: {{ $}} 194 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 195 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 196 ; CHECK-NEXT: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags 197 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags 198 ; CHECK-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 199 ; CHECK-NEXT: [[SETCCr2:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags 200 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags 201 ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags 202 ; CHECK-NEXT: [[CMOV64rr:%[0-9]+]]:gr64 = CMOV64rr [[COPY]], [[COPY1]], 5, implicit killed $eflags 203 ; CHECK-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags 204 ; CHECK-NEXT: [[CMOV64rr1:%[0-9]+]]:gr64 = CMOV64rr [[COPY]], [[COPY1]], 5, implicit killed $eflags 205 ; CHECK-NEXT: TEST8rr [[SETCCr2]], [[SETCCr2]], implicit-def $eflags 206 ; CHECK-NEXT: [[CMOV64rr2:%[0-9]+]]:gr64 = CMOV64rr [[COPY]], [[COPY1]], 5, implicit killed $eflags 207 ; CHECK-NEXT: TEST8rr [[SETCCr2]], [[SETCCr2]], implicit-def $eflags 208 ; CHECK-NEXT: [[CMOV64rr3:%[0-9]+]]:gr64 = CMOV64rr [[COPY]], [[COPY1]], 4, implicit killed $eflags 209 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CMOV64rr]] 210 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CMOV64rr1]] 211 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CMOV64rr2]] 212 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CMOV64rr3]] 213 ; CHECK-NEXT: RET 0 214 %0:gr64 = COPY $rdi 215 %1:gr64 = COPY $rsi 216 CMP64rr %0, %1, implicit-def $eflags 217 %2:gr64 = COPY $eflags 218 219 INLINEASM &nop, 1, 12, implicit-def dead $eflags 220 221 $eflags = COPY %2 222 %3:gr64 = CMOV64rr %0, %1, 7, implicit $eflags 223 %4:gr64 = CMOV64rr %0, %1, 2, implicit $eflags 224 %5:gr64 = CMOV64rr %0, %1, 4, implicit $eflags 225 %6:gr64 = CMOV64rr %0, %1, 5, implicit killed $eflags 226 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %3 227 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4 228 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5 229 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %6 230 231 RET 0 232 233... 234--- 235name: test_adc 236body: | 237 bb.0: 238 liveins: $rdi, $rsi 239 240 ; CHECK-LABEL: name: test_adc 241 ; CHECK: liveins: $rdi, $rsi 242 ; CHECK-NEXT: {{ $}} 243 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 244 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 245 ; CHECK-NEXT: [[ADD64rr:%[0-9]+]]:gr64 = ADD64rr [[COPY]], [[COPY1]], implicit-def $eflags 246 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 247 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags 248 ; CHECK-NEXT: dead [[ADD8ri:%[0-9]+]]:gr8 = ADD8ri [[SETCCr]], 255, implicit-def $eflags 249 ; CHECK-NEXT: [[ADC64ri32_:%[0-9]+]]:gr64 = ADC64ri32 [[ADD64rr]], 42, implicit-def $eflags, implicit killed $eflags 250 ; CHECK-NEXT: [[ADC64ri32_1:%[0-9]+]]:gr64 = ADC64ri32 [[ADC64ri32_]], 42, implicit-def $eflags, implicit $eflags 251 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[ADC64ri32_1]] 252 ; CHECK-NEXT: RET 0 253 %0:gr64 = COPY $rdi 254 %1:gr64 = COPY $rsi 255 %2:gr64 = ADD64rr %0, %1, implicit-def $eflags 256 %3:gr64 = COPY $eflags 257 258 INLINEASM &nop, 1, 12, implicit-def dead $eflags 259 260 $eflags = COPY %3 261 %4:gr64 = ADC64ri32 %2:gr64, 42, implicit-def $eflags, implicit $eflags 262 %5:gr64 = ADC64ri32 %4:gr64, 42, implicit-def $eflags, implicit $eflags 263 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5 264 265 RET 0 266 267... 268--- 269name: test_sbb 270body: | 271 bb.0: 272 liveins: $rdi, $rsi 273 274 ; CHECK-LABEL: name: test_sbb 275 ; CHECK: liveins: $rdi, $rsi 276 ; CHECK-NEXT: {{ $}} 277 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 278 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 279 ; CHECK-NEXT: [[SUB64rr:%[0-9]+]]:gr64 = SUB64rr [[COPY]], [[COPY1]], implicit-def $eflags 280 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 281 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags 282 ; CHECK-NEXT: dead [[ADD8ri:%[0-9]+]]:gr8 = ADD8ri [[SETCCr]], 255, implicit-def $eflags 283 ; CHECK-NEXT: [[SBB64ri32_:%[0-9]+]]:gr64 = SBB64ri32 [[SUB64rr]], 42, implicit-def $eflags, implicit killed $eflags 284 ; CHECK-NEXT: [[SBB64ri32_1:%[0-9]+]]:gr64 = SBB64ri32 [[SBB64ri32_]], 42, implicit-def dead $eflags, implicit killed $eflags 285 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[SBB64ri32_1]] 286 ; CHECK-NEXT: RET 0 287 %0:gr64 = COPY $rdi 288 %1:gr64 = COPY $rsi 289 %2:gr64 = SUB64rr %0, %1, implicit-def $eflags 290 %3:gr64 = COPY killed $eflags 291 292 INLINEASM &nop, 1, 12, implicit-def dead $eflags 293 294 $eflags = COPY %3 295 %4:gr64 = SBB64ri32 %2:gr64, 42, implicit-def $eflags, implicit killed $eflags 296 %5:gr64 = SBB64ri32 %4:gr64, 42, implicit-def dead $eflags, implicit killed $eflags 297 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5 298 299 RET 0 300 301... 302--- 303name: test_rcl 304body: | 305 bb.0: 306 liveins: $rdi, $rsi 307 308 ; CHECK-LABEL: name: test_rcl 309 ; CHECK: liveins: $rdi, $rsi 310 ; CHECK-NEXT: {{ $}} 311 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 312 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 313 ; CHECK-NEXT: [[ADD64rr:%[0-9]+]]:gr64 = ADD64rr [[COPY]], [[COPY1]], implicit-def $eflags 314 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 315 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags 316 ; CHECK-NEXT: dead [[ADD8ri:%[0-9]+]]:gr8 = ADD8ri [[SETCCr]], 255, implicit-def $eflags 317 ; CHECK-NEXT: [[RCL64r1_:%[0-9]+]]:gr64 = RCL64r1 [[ADD64rr]], implicit-def $eflags, implicit killed $eflags 318 ; CHECK-NEXT: [[RCL64r1_1:%[0-9]+]]:gr64 = RCL64r1 [[RCL64r1_]], implicit-def $eflags, implicit $eflags 319 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[RCL64r1_1]] 320 ; CHECK-NEXT: RET 0 321 %0:gr64 = COPY $rdi 322 %1:gr64 = COPY $rsi 323 %2:gr64 = ADD64rr %0, %1, implicit-def $eflags 324 %3:gr64 = COPY $eflags 325 326 INLINEASM &nop, 1, 12, implicit-def dead $eflags 327 328 $eflags = COPY %3 329 %4:gr64 = RCL64r1 %2:gr64, implicit-def $eflags, implicit $eflags 330 %5:gr64 = RCL64r1 %4:gr64, implicit-def $eflags, implicit $eflags 331 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5 332 333 RET 0 334 335... 336--- 337name: test_rcr 338body: | 339 bb.0: 340 liveins: $rdi, $rsi 341 342 ; CHECK-LABEL: name: test_rcr 343 ; CHECK: liveins: $rdi, $rsi 344 ; CHECK-NEXT: {{ $}} 345 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 346 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 347 ; CHECK-NEXT: [[ADD64rr:%[0-9]+]]:gr64 = ADD64rr [[COPY]], [[COPY1]], implicit-def $eflags 348 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 349 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags 350 ; CHECK-NEXT: dead [[ADD8ri:%[0-9]+]]:gr8 = ADD8ri [[SETCCr]], 255, implicit-def $eflags 351 ; CHECK-NEXT: [[RCR64r1_:%[0-9]+]]:gr64 = RCR64r1 [[ADD64rr]], implicit-def $eflags, implicit killed $eflags 352 ; CHECK-NEXT: [[RCR64r1_1:%[0-9]+]]:gr64 = RCR64r1 [[RCR64r1_]], implicit-def $eflags, implicit $eflags 353 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[RCR64r1_1]] 354 ; CHECK-NEXT: RET 0 355 %0:gr64 = COPY $rdi 356 %1:gr64 = COPY $rsi 357 %2:gr64 = ADD64rr %0, %1, implicit-def $eflags 358 %3:gr64 = COPY $eflags 359 360 INLINEASM &nop, 1, 12, implicit-def dead $eflags 361 362 $eflags = COPY %3 363 %4:gr64 = RCR64r1 %2:gr64, implicit-def $eflags, implicit $eflags 364 %5:gr64 = RCR64r1 %4:gr64, implicit-def $eflags, implicit $eflags 365 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5 366 367 RET 0 368 369... 370--- 371name: test_setb_c 372body: | 373 bb.0: 374 liveins: $rdi, $rsi 375 376 ; CHECK-LABEL: name: test_setb_c 377 ; CHECK: liveins: $rdi, $rsi 378 ; CHECK-NEXT: {{ $}} 379 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 380 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 381 ; CHECK-NEXT: [[ADD64rr:%[0-9]+]]:gr64 = ADD64rr [[COPY]], [[COPY1]], implicit-def $eflags 382 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 383 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags 384 ; CHECK-NEXT: dead [[ADD8ri:%[0-9]+]]:gr8 = ADD8ri [[SETCCr]], 255, implicit-def $eflags 385 ; CHECK-NEXT: [[SETB_C32r:%[0-9]+]]:gr32 = SETB_C32r implicit-def $eflags, implicit killed $eflags 386 ; CHECK-NEXT: MOV32mr $rsp, 1, $noreg, -16, $noreg, killed [[SETB_C32r]] 387 ; CHECK-NEXT: dead [[ADD8ri1:%[0-9]+]]:gr8 = ADD8ri [[SETCCr]], 255, implicit-def $eflags 388 ; CHECK-NEXT: [[SETB_C64r:%[0-9]+]]:gr64 = SETB_C64r implicit-def $eflags, implicit killed $eflags 389 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[SETB_C64r]] 390 ; CHECK-NEXT: RET 0 391 %0:gr64 = COPY $rdi 392 %1:gr64 = COPY $rsi 393 %2:gr64 = ADD64rr %0, %1, implicit-def $eflags 394 %3:gr64 = COPY $eflags 395 396 INLINEASM &nop, 1, 12, implicit-def dead $eflags 397 398 $eflags = COPY %3 399 %4:gr32 = SETB_C32r implicit-def $eflags, implicit $eflags 400 MOV32mr $rsp, 1, $noreg, -16, $noreg, killed %4 401 402 $eflags = COPY %3 403 %5:gr64 = SETB_C64r implicit-def $eflags, implicit $eflags 404 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5 405 406 RET 0 407 408... 409--- 410name: test_branch_with_livein_and_kill 411body: | 412 ; CHECK-LABEL: name: test_branch_with_livein_and_kill 413 ; CHECK: bb.0: 414 ; CHECK-NEXT: successors: %bb.1(0x2aaaaaab), %bb.4(0x55555556) 415 ; CHECK-NEXT: liveins: $rdi, $rsi 416 ; CHECK-NEXT: {{ $}} 417 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 418 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 419 ; CHECK-NEXT: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags 420 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 8, implicit $eflags 421 ; CHECK-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags 422 ; CHECK-NEXT: [[SETCCr2:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags 423 ; CHECK-NEXT: [[SETCCr3:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 424 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags 425 ; CHECK-NEXT: TEST8rr [[SETCCr2]], [[SETCCr2]], implicit-def $eflags 426 ; CHECK-NEXT: JCC_1 %bb.1, 5, implicit killed $eflags 427 ; CHECK-NEXT: {{ $}} 428 ; CHECK-NEXT: bb.4: 429 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000) 430 ; CHECK-NEXT: {{ $}} 431 ; CHECK-NEXT: TEST8rr [[SETCCr3]], [[SETCCr3]], implicit-def $eflags 432 ; CHECK-NEXT: JCC_1 %bb.2, 5, implicit killed $eflags 433 ; CHECK-NEXT: JMP_1 %bb.3 434 ; CHECK-NEXT: {{ $}} 435 ; CHECK-NEXT: bb.1: 436 ; CHECK-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags 437 ; CHECK-NEXT: [[CMOV64rr:%[0-9]+]]:gr64 = CMOV64rr [[COPY]], [[COPY1]], 4, implicit killed $eflags 438 ; CHECK-NEXT: $rax = COPY [[CMOV64rr]] 439 ; CHECK-NEXT: RET 0, $rax 440 ; CHECK-NEXT: {{ $}} 441 ; CHECK-NEXT: bb.2: 442 ; CHECK-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags 443 ; CHECK-NEXT: [[CMOV64rr1:%[0-9]+]]:gr64 = CMOV64rr [[COPY]], [[COPY1]], 5, implicit killed $eflags 444 ; CHECK-NEXT: $rax = COPY [[CMOV64rr1]] 445 ; CHECK-NEXT: RET 0, $rax 446 ; CHECK-NEXT: {{ $}} 447 ; CHECK-NEXT: bb.3: 448 ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags 449 ; CHECK-NEXT: [[CMOV64rr2:%[0-9]+]]:gr64 = CMOV64rr [[COPY]], [[COPY1]], 5, implicit killed $eflags 450 ; CHECK-NEXT: $rax = COPY [[CMOV64rr2]] 451 ; CHECK-NEXT: RET 0, $rax 452 bb.0: 453 successors: %bb.1, %bb.2, %bb.3 454 liveins: $rdi, $rsi 455 456 %0:gr64 = COPY $rdi 457 %1:gr64 = COPY $rsi 458 CMP64rr %0, %1, implicit-def $eflags 459 %2:gr64 = COPY $eflags 460 461 INLINEASM &nop, 1, 12, implicit-def dead $eflags 462 463 $eflags = COPY %2 464 JCC_1 %bb.1, 7, implicit $eflags 465 JCC_1 %bb.2, 2, implicit $eflags 466 JMP_1 %bb.3 467 468 bb.1: 469 liveins: $eflags 470 471 %3:gr64 = CMOV64rr %0, %1, 4, implicit killed $eflags 472 $rax = COPY %3 473 RET 0, $rax 474 475 bb.2: 476 liveins: $eflags 477 478 %4:gr64 = CMOV64rr %0, %1, 5, implicit killed $eflags 479 $rax = COPY %4 480 RET 0, $rax 481 482 bb.3: 483 liveins: $eflags 484 485 %5:gr64 = CMOV64rr %0, %1, 8, implicit killed $eflags 486 $rax = COPY %5 487 RET 0, $rax 488 489... 490--- 491name: test_branch_with_interleaved_livein_and_kill 492body: | 493 ; CHECK-LABEL: name: test_branch_with_interleaved_livein_and_kill 494 ; CHECK: bb.0: 495 ; CHECK-NEXT: successors: %bb.1(0x2aaaaaab), %bb.6(0x55555556) 496 ; CHECK-NEXT: liveins: $rdi, $rsi 497 ; CHECK-NEXT: {{ $}} 498 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 499 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 500 ; CHECK-NEXT: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags 501 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 8, implicit $eflags 502 ; CHECK-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 10, implicit $eflags 503 ; CHECK-NEXT: [[SETCCr2:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags 504 ; CHECK-NEXT: [[SETCCr3:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags 505 ; CHECK-NEXT: [[SETCCr4:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 506 ; CHECK-NEXT: [[SETCCr5:%[0-9]+]]:gr8 = SETCCr 0, implicit $eflags 507 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags 508 ; CHECK-NEXT: TEST8rr [[SETCCr3]], [[SETCCr3]], implicit-def $eflags 509 ; CHECK-NEXT: JCC_1 %bb.1, 5, implicit killed $eflags 510 ; CHECK-NEXT: {{ $}} 511 ; CHECK-NEXT: bb.6: 512 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.5(0x40000000) 513 ; CHECK-NEXT: {{ $}} 514 ; CHECK-NEXT: TEST8rr [[SETCCr4]], [[SETCCr4]], implicit-def $eflags 515 ; CHECK-NEXT: JCC_1 %bb.2, 5, implicit killed $eflags 516 ; CHECK-NEXT: JMP_1 %bb.5 517 ; CHECK-NEXT: {{ $}} 518 ; CHECK-NEXT: bb.1: 519 ; CHECK-NEXT: TEST8rr [[SETCCr2]], [[SETCCr2]], implicit-def $eflags 520 ; CHECK-NEXT: [[CMOV64rr:%[0-9]+]]:gr64 = CMOV64rr [[COPY]], [[COPY1]], 4, implicit killed $eflags 521 ; CHECK-NEXT: $rax = COPY [[CMOV64rr]] 522 ; CHECK-NEXT: RET 0, $rax 523 ; CHECK-NEXT: {{ $}} 524 ; CHECK-NEXT: bb.2: 525 ; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000) 526 ; CHECK-NEXT: {{ $}} 527 ; CHECK-NEXT: TEST8rr [[SETCCr5]], [[SETCCr5]], implicit-def $eflags 528 ; CHECK-NEXT: JCC_1 %bb.3, 5, implicit killed $eflags 529 ; CHECK-NEXT: JMP_1 %bb.4 530 ; CHECK-NEXT: {{ $}} 531 ; CHECK-NEXT: bb.3: 532 ; CHECK-NEXT: TEST8rr [[SETCCr2]], [[SETCCr2]], implicit-def $eflags 533 ; CHECK-NEXT: [[CMOV64rr1:%[0-9]+]]:gr64 = CMOV64rr [[COPY]], [[COPY1]], 5, implicit killed $eflags 534 ; CHECK-NEXT: $rax = COPY [[CMOV64rr1]] 535 ; CHECK-NEXT: RET 0, $rax 536 ; CHECK-NEXT: {{ $}} 537 ; CHECK-NEXT: bb.4: 538 ; CHECK-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags 539 ; CHECK-NEXT: [[CMOV64rr2:%[0-9]+]]:gr64 = CMOV64rr [[COPY]], [[COPY1]], 5, implicit killed $eflags 540 ; CHECK-NEXT: $rax = COPY [[CMOV64rr2]] 541 ; CHECK-NEXT: RET 0, $rax 542 ; CHECK-NEXT: {{ $}} 543 ; CHECK-NEXT: bb.5: 544 ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags 545 ; CHECK-NEXT: [[CMOV64rr3:%[0-9]+]]:gr64 = CMOV64rr [[COPY]], [[COPY1]], 5, implicit killed $eflags 546 ; CHECK-NEXT: $rax = COPY [[CMOV64rr3]] 547 ; CHECK-NEXT: RET 0, $rax 548 bb.0: 549 successors: %bb.1, %bb.2, %bb.5 550 liveins: $rdi, $rsi 551 552 %0:gr64 = COPY $rdi 553 %1:gr64 = COPY $rsi 554 CMP64rr %0, %1, implicit-def $eflags 555 %2:gr64 = COPY $eflags 556 557 INLINEASM &nop, 1, 12, implicit-def dead $eflags 558 559 $eflags = COPY %2 560 JCC_1 %bb.1, 7, implicit $eflags 561 JCC_1 %bb.2, 2, implicit $eflags 562 JMP_1 %bb.5 563 564 bb.1: 565 liveins: $eflags 566 567 %3:gr64 = CMOV64rr %0, %1, 4, implicit killed $eflags 568 $rax = COPY %3 569 RET 0, $rax 570 571 bb.2: 572 successors: %bb.3, %bb.4 573 liveins: $eflags 574 575 JCC_1 %bb.3, 0, implicit $eflags 576 JMP_1 %bb.4 577 578 bb.3: 579 liveins: $eflags 580 581 %4:gr64 = CMOV64rr %0, %1, 5, implicit $eflags 582 $rax = COPY %4 583 RET 0, $rax 584 585 bb.4: 586 liveins: $eflags 587 588 %5:gr64 = CMOV64rr %0, %1, 10, implicit $eflags 589 $rax = COPY %5 590 RET 0, $rax 591 592 bb.5: 593 liveins: $eflags 594 595 %6:gr64 = CMOV64rr %0, %1, 8, implicit killed $eflags 596 $rax = COPY %6 597 RET 0, $rax 598 599... 600--- 601# This test case is designed to exercise a particularly challenging situation: 602# when the flags are copied and restored *inside* of a complex and cyclic CFG 603# all of which have live-in flags. To correctly handle this case we have to walk 604# up the dominator tree and locate a viable reaching definition location, 605# checking for clobbers along any path. The CFG for this function looks like the 606# following diagram, control flowing out the bottom of blocks and in the top: 607# 608# bb.0 609# | __________________ 610# |/ \ 611# bb.1 | 612# |\_________ | 613# | __ \ ____ | 614# |/ \ |/ \ | 615# bb.2 | bb.4 | | 616# |\__/ / \ | | 617# | / \ | | 618# bb.3 bb.5 bb.6 | | 619# | \ / | | 620# | \ / | | 621# | bb.7 | | 622# | ________/ \____/ | 623# |/ | 624# bb.8 | 625# |\__________________/ 626# | 627# bb.9 628# 629# We set EFLAGS in bb.0, clobber them in bb.3, and copy them in bb.2 and bb.6. 630# Because of the cycles this requires hoisting the `SETcc` instructions to 631# capture the flags for the bb.6 copy to bb.1 and using them for the copy in 632# `bb.2` as well despite the clobber in `bb.3`. The clobber in `bb.3` also 633# prevents hoisting the `SETcc`s up to `bb.0`. 634# 635# Throughout the test we use branch instructions that are totally bogus (as the 636# flags are obviously not changing!) but this is just to allow us to send 637# a small but complex CFG structure through the backend and force it to choose 638# plausible lowering decisions based on the core CFG presented, regardless of 639# the futility of the actual branches. 640name: test_mid_cycle_copies 641body: | 642 ; CHECK-LABEL: name: test_mid_cycle_copies 643 ; CHECK: bb.0: 644 ; CHECK-NEXT: successors: %bb.1(0x80000000) 645 ; CHECK-NEXT: liveins: $rdi, $rsi 646 ; CHECK-NEXT: {{ $}} 647 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 648 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 649 ; CHECK-NEXT: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags 650 ; CHECK-NEXT: JMP_1 %bb.1 651 ; CHECK-NEXT: {{ $}} 652 ; CHECK-NEXT: bb.1: 653 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.4(0x40000000) 654 ; CHECK-NEXT: liveins: $eflags 655 ; CHECK-NEXT: {{ $}} 656 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags 657 ; CHECK-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags 658 ; CHECK-NEXT: [[SETCCr2:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 659 ; CHECK-NEXT: JCC_1 %bb.2, 4, implicit $eflags 660 ; CHECK-NEXT: JMP_1 %bb.4 661 ; CHECK-NEXT: {{ $}} 662 ; CHECK-NEXT: bb.2: 663 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000) 664 ; CHECK-NEXT: {{ $}} 665 ; CHECK-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags 666 ; CHECK-NEXT: JCC_1 %bb.2, 5, implicit killed $eflags 667 ; CHECK-NEXT: JMP_1 %bb.3 668 ; CHECK-NEXT: {{ $}} 669 ; CHECK-NEXT: bb.3: 670 ; CHECK-NEXT: successors: %bb.8(0x80000000) 671 ; CHECK-NEXT: {{ $}} 672 ; CHECK-NEXT: dead [[ADD8ri:%[0-9]+]]:gr8 = ADD8ri [[SETCCr2]], 255, implicit-def $eflags 673 ; CHECK-NEXT: [[ADC64ri32_:%[0-9]+]]:gr64 = ADC64ri32 [[COPY]], 42, implicit-def dead $eflags, implicit killed $eflags 674 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[ADC64ri32_]] 675 ; CHECK-NEXT: JMP_1 %bb.8 676 ; CHECK-NEXT: {{ $}} 677 ; CHECK-NEXT: bb.4: 678 ; CHECK-NEXT: successors: %bb.5(0x40000000), %bb.6(0x40000000) 679 ; CHECK-NEXT: {{ $}} 680 ; CHECK-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags 681 ; CHECK-NEXT: JCC_1 %bb.5, 5, implicit killed $eflags 682 ; CHECK-NEXT: JMP_1 %bb.6 683 ; CHECK-NEXT: {{ $}} 684 ; CHECK-NEXT: bb.5: 685 ; CHECK-NEXT: successors: %bb.7(0x80000000) 686 ; CHECK-NEXT: {{ $}} 687 ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags 688 ; CHECK-NEXT: [[CMOV64rr:%[0-9]+]]:gr64 = CMOV64rr [[COPY]], [[COPY1]], 5, implicit killed $eflags 689 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CMOV64rr]] 690 ; CHECK-NEXT: JMP_1 %bb.7 691 ; CHECK-NEXT: {{ $}} 692 ; CHECK-NEXT: bb.6: 693 ; CHECK-NEXT: successors: %bb.7(0x80000000) 694 ; CHECK-NEXT: {{ $}} 695 ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags 696 ; CHECK-NEXT: [[CMOV64rr1:%[0-9]+]]:gr64 = CMOV64rr [[COPY]], [[COPY1]], 5, implicit killed $eflags 697 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CMOV64rr1]] 698 ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags 699 ; CHECK-NEXT: [[CMOV64rr2:%[0-9]+]]:gr64 = CMOV64rr [[COPY]], [[COPY1]], 5, implicit killed $eflags 700 ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CMOV64rr2]] 701 ; CHECK-NEXT: JMP_1 %bb.7 702 ; CHECK-NEXT: {{ $}} 703 ; CHECK-NEXT: bb.7: 704 ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.8(0x40000000) 705 ; CHECK-NEXT: {{ $}} 706 ; CHECK-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags 707 ; CHECK-NEXT: JCC_1 %bb.4, 5, implicit killed $eflags 708 ; CHECK-NEXT: JMP_1 %bb.8 709 ; CHECK-NEXT: {{ $}} 710 ; CHECK-NEXT: bb.8: 711 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.9(0x40000000) 712 ; CHECK-NEXT: {{ $}} 713 ; CHECK-NEXT: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags 714 ; CHECK-NEXT: JCC_1 %bb.1, 4, implicit $eflags 715 ; CHECK-NEXT: JMP_1 %bb.9 716 ; CHECK-NEXT: {{ $}} 717 ; CHECK-NEXT: bb.9: 718 ; CHECK-NEXT: liveins: $eflags 719 ; CHECK-NEXT: {{ $}} 720 ; CHECK-NEXT: [[CMOV64rr3:%[0-9]+]]:gr64 = CMOV64rr [[COPY]], [[COPY1]], 4, implicit killed $eflags 721 ; CHECK-NEXT: $rax = COPY [[CMOV64rr3]] 722 ; CHECK-NEXT: RET 0, $rax 723 bb.0: 724 successors: %bb.1 725 liveins: $rdi, $rsi 726 727 %0:gr64 = COPY $rdi 728 %1:gr64 = COPY $rsi 729 CMP64rr %0, %1, implicit-def $eflags 730 JMP_1 %bb.1 731 732 bb.1: 733 successors: %bb.2, %bb.4 734 liveins: $eflags 735 736 JCC_1 %bb.2, 4, implicit $eflags 737 JMP_1 %bb.4 738 739 bb.2: 740 successors: %bb.2, %bb.3 741 liveins: $eflags 742 743 %2:gr64 = COPY $eflags 744 $eflags = COPY %2 745 JCC_1 %bb.2, 4, implicit $eflags 746 JMP_1 %bb.3 747 748 bb.3: 749 successors: %bb.8 750 liveins: $eflags 751 752 %3:gr64 = ADC64ri32 %0, 42, implicit-def dead $eflags, implicit $eflags 753 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %3 754 JMP_1 %bb.8 755 756 bb.4: 757 successors: %bb.5, %bb.6 758 liveins: $eflags 759 760 JCC_1 %bb.5, 4, implicit $eflags 761 JMP_1 %bb.6 762 763 bb.5: 764 successors: %bb.7 765 liveins: $eflags 766 767 %4:gr64 = CMOV64rr %0, %1, 7, implicit $eflags 768 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4 769 JMP_1 %bb.7 770 771 bb.6: 772 successors: %bb.7 773 liveins: $eflags 774 775 %5:gr64 = CMOV64rr %0, %1, 7, implicit $eflags 776 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5 777 778 %6:gr64 = COPY $eflags 779 $eflags = COPY %6:gr64 780 781 %7:gr64 = CMOV64rr %0, %1, 7, implicit $eflags 782 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %7 783 JMP_1 %bb.7 784 785 bb.7: 786 successors: %bb.4, %bb.8 787 liveins: $eflags 788 789 JCC_1 %bb.4, 4, implicit $eflags 790 JMP_1 %bb.8 791 792 bb.8: 793 successors: %bb.1, %bb.9 794 795 CMP64rr %0, %1, implicit-def $eflags 796 JCC_1 %bb.1, 4, implicit $eflags 797 JMP_1 %bb.9 798 799 bb.9: 800 liveins: $eflags 801 802 %8:gr64 = CMOV64rr %0, %1, 4, implicit killed $eflags 803 $rax = COPY %8 804 RET 0, $rax 805 806... 807--- 808name: test_existing_setcc 809body: | 810 ; CHECK-LABEL: name: test_existing_setcc 811 ; CHECK: bb.0: 812 ; CHECK-NEXT: successors: %bb.1(0x2aaaaaab), %bb.4(0x55555556) 813 ; CHECK-NEXT: liveins: $rdi, $rsi 814 ; CHECK-NEXT: {{ $}} 815 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 816 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 817 ; CHECK-NEXT: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags 818 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags 819 ; CHECK-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags 820 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags 821 ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags 822 ; CHECK-NEXT: JCC_1 %bb.1, 5, implicit killed $eflags 823 ; CHECK-NEXT: {{ $}} 824 ; CHECK-NEXT: bb.4: 825 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000) 826 ; CHECK-NEXT: {{ $}} 827 ; CHECK-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags 828 ; CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags 829 ; CHECK-NEXT: JMP_1 %bb.3 830 ; CHECK-NEXT: {{ $}} 831 ; CHECK-NEXT: bb.1: 832 ; CHECK-NEXT: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 42 833 ; CHECK-NEXT: $eax = COPY [[MOV32ri]] 834 ; CHECK-NEXT: RET 0, $eax 835 ; CHECK-NEXT: {{ $}} 836 ; CHECK-NEXT: bb.2: 837 ; CHECK-NEXT: [[MOV32ri1:%[0-9]+]]:gr32 = MOV32ri 43 838 ; CHECK-NEXT: $eax = COPY [[MOV32ri1]] 839 ; CHECK-NEXT: RET 0, $eax 840 ; CHECK-NEXT: {{ $}} 841 ; CHECK-NEXT: bb.3: 842 ; CHECK-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags 843 ; CHECK-NEXT: $eax = COPY [[MOV32r0_]] 844 ; CHECK-NEXT: RET 0, $eax 845 bb.0: 846 successors: %bb.1, %bb.2, %bb.3 847 liveins: $rdi, $rsi 848 849 %0:gr64 = COPY $rdi 850 %1:gr64 = COPY $rsi 851 CMP64rr %0, %1, implicit-def $eflags 852 %2:gr8 = SETCCr 7, implicit $eflags 853 %3:gr8 = SETCCr 3, implicit $eflags 854 %4:gr64 = COPY $eflags 855 856 INLINEASM &nop, 1, 12, implicit-def dead $eflags 857 858 $eflags = COPY %4 859 JCC_1 %bb.1, 7, implicit $eflags 860 JCC_1 %bb.2, 2, implicit $eflags 861 JMP_1 %bb.3 862 863 bb.1: 864 %5:gr32 = MOV32ri 42 865 $eax = COPY %5 866 RET 0, $eax 867 868 bb.2: 869 %6:gr32 = MOV32ri 43 870 $eax = COPY %6 871 RET 0, $eax 872 873 bb.3: 874 %7:gr32 = MOV32r0 implicit-def dead $eflags 875 $eax = COPY %7 876 RET 0, $eax 877 878... 879--- 880# We cannot reuse this SETE because it stores the flag directly to memory, 881# so we have two SETEs here. FIXME: It'd be great if something could fold 882# these automatically. If not, maybe we want to unfold SETcc instructions 883# writing to memory so we can reuse them. 884 885name: test_existing_setcc_memory 886body: | 887 ; CHECK-LABEL: name: test_existing_setcc_memory 888 ; CHECK: bb.0: 889 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 890 ; CHECK-NEXT: liveins: $rdi, $rsi 891 ; CHECK-NEXT: {{ $}} 892 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 893 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 894 ; CHECK-NEXT: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags 895 ; CHECK-NEXT: SETCCm [[COPY]], 1, $noreg, -16, $noreg, 4, implicit $eflags 896 ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags 897 ; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead $eflags 898 ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags 899 ; CHECK-NEXT: JCC_1 %bb.1, 5, implicit killed $eflags 900 ; CHECK-NEXT: JMP_1 %bb.2 901 ; CHECK-NEXT: {{ $}} 902 ; CHECK-NEXT: bb.1: 903 ; CHECK-NEXT: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 42 904 ; CHECK-NEXT: $eax = COPY [[MOV32ri]] 905 ; CHECK-NEXT: RET 0, $eax 906 ; CHECK-NEXT: {{ $}} 907 ; CHECK-NEXT: bb.2: 908 ; CHECK-NEXT: [[MOV32ri1:%[0-9]+]]:gr32 = MOV32ri 43 909 ; CHECK-NEXT: $eax = COPY [[MOV32ri1]] 910 ; CHECK-NEXT: RET 0, $eax 911 bb.0: 912 successors: %bb.1, %bb.2 913 liveins: $rdi, $rsi 914 915 %0:gr64 = COPY $rdi 916 %1:gr64 = COPY $rsi 917 CMP64rr %0, %1, implicit-def $eflags 918 SETCCm %0, 1, $noreg, -16, $noreg, 4, implicit $eflags 919 %2:gr64 = COPY $eflags 920 921 INLINEASM &nop, 1, 12, implicit-def dead $eflags 922 923 $eflags = COPY %2 924 JCC_1 %bb.1, 4, implicit $eflags 925 JMP_1 %bb.2 926 927 bb.1: 928 %3:gr32 = MOV32ri 42 929 $eax = COPY %3 930 RET 0, $eax 931 932 bb.2: 933 %4:gr32 = MOV32ri 43 934 $eax = COPY %4 935 RET 0, $eax 936 937... 938