1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=SSE 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX 5; 6; Verify that fast-isel doesn't select legacy SSE instructions on targets that 7; feature AVX. 8; 9; Test cases are obtained from the following code snippet: 10; /// 11; double single_to_double_rr(float x) { 12; return (double)x; 13; } 14; float double_to_single_rr(double x) { 15; return (float)x; 16; } 17; double single_to_double_rm(ptr x) { 18; return (double)*x; 19; } 20; float double_to_single_rm(ptr x) { 21; return (float)*x; 22; } 23; /// 24 25define double @single_to_double_rr(float %x) { 26; SSE-LABEL: single_to_double_rr: 27; SSE: # %bb.0: # %entry 28; SSE-NEXT: cvtss2sd %xmm0, %xmm0 29; SSE-NEXT: retq 30; 31; AVX-LABEL: single_to_double_rr: 32; AVX: # %bb.0: # %entry 33; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0 34; AVX-NEXT: retq 35entry: 36 %conv = fpext float %x to double 37 ret double %conv 38} 39 40define float @double_to_single_rr(double %x) { 41; SSE-LABEL: double_to_single_rr: 42; SSE: # %bb.0: # %entry 43; SSE-NEXT: cvtsd2ss %xmm0, %xmm0 44; SSE-NEXT: retq 45; 46; AVX-LABEL: double_to_single_rr: 47; AVX: # %bb.0: # %entry 48; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0 49; AVX-NEXT: retq 50entry: 51 %conv = fptrunc double %x to float 52 ret float %conv 53} 54 55define double @single_to_double_rm(ptr %x) { 56; SSE-LABEL: single_to_double_rm: 57; SSE: # %bb.0: # %entry 58; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 59; SSE-NEXT: cvtss2sd %xmm0, %xmm0 60; SSE-NEXT: retq 61; 62; AVX-LABEL: single_to_double_rm: 63; AVX: # %bb.0: # %entry 64; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 65; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0 66; AVX-NEXT: retq 67entry: 68 %0 = load float, ptr %x, align 4 69 %conv = fpext float %0 to double 70 ret double %conv 71} 72 73define double @single_to_double_rm_optsize(ptr %x) optsize { 74; SSE-LABEL: single_to_double_rm_optsize: 75; SSE: # %bb.0: # %entry 76; SSE-NEXT: cvtss2sd (%rdi), %xmm0 77; SSE-NEXT: retq 78; 79; AVX-LABEL: single_to_double_rm_optsize: 80; AVX: # %bb.0: # %entry 81; AVX-NEXT: vcvtss2sd (%rdi), %xmm0, %xmm0 82; AVX-NEXT: retq 83entry: 84 %0 = load float, ptr %x, align 4 85 %conv = fpext float %0 to double 86 ret double %conv 87} 88 89define float @double_to_single_rm(ptr %x) { 90; SSE-LABEL: double_to_single_rm: 91; SSE: # %bb.0: # %entry 92; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 93; SSE-NEXT: cvtsd2ss %xmm0, %xmm0 94; SSE-NEXT: retq 95; 96; AVX-LABEL: double_to_single_rm: 97; AVX: # %bb.0: # %entry 98; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 99; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0 100; AVX-NEXT: retq 101entry: 102 %0 = load double, ptr %x, align 8 103 %conv = fptrunc double %0 to float 104 ret float %conv 105} 106 107define float @double_to_single_rm_optsize(ptr %x) optsize { 108; SSE-LABEL: double_to_single_rm_optsize: 109; SSE: # %bb.0: # %entry 110; SSE-NEXT: cvtsd2ss (%rdi), %xmm0 111; SSE-NEXT: retq 112; 113; AVX-LABEL: double_to_single_rm_optsize: 114; AVX: # %bb.0: # %entry 115; AVX-NEXT: vcvtsd2ss (%rdi), %xmm0, %xmm0 116; AVX-NEXT: retq 117entry: 118 %0 = load double, ptr %x, align 8 119 %conv = fptrunc double %0 to float 120 ret float %conv 121} 122