xref: /llvm-project/llvm/test/CodeGen/X86/extractelement-legalization-store-ordering.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | FileCheck %s
3
4target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
5
6; Make sure we don't break load/store ordering when turning an extractelement
7; into loads, off the stack or a previous store.
8; Be very explicit about the ordering/stack offsets.
9
10define void @test_extractelement_legalization_storereuse(<4 x i32> %a, ptr nocapture %x, ptr nocapture readonly %y, i32 %i) #0 {
11; CHECK-LABEL: test_extractelement_legalization_storereuse:
12; CHECK:       ## %bb.0: ## %entry
13; CHECK-NEXT:    pushl %ebx
14; CHECK-NEXT:    pushl %edi
15; CHECK-NEXT:    pushl %esi
16; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
17; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
18; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
19; CHECK-NEXT:    paddd (%edx), %xmm0
20; CHECK-NEXT:    movdqa %xmm0, (%edx)
21; CHECK-NEXT:    movl (%edx), %esi
22; CHECK-NEXT:    movl 4(%edx), %edi
23; CHECK-NEXT:    shll $4, %ecx
24; CHECK-NEXT:    movl 8(%edx), %ebx
25; CHECK-NEXT:    movl 12(%edx), %edx
26; CHECK-NEXT:    movl %esi, 12(%eax,%ecx)
27; CHECK-NEXT:    movl %edi, (%eax,%ecx)
28; CHECK-NEXT:    movl %ebx, 8(%eax,%ecx)
29; CHECK-NEXT:    movl %edx, 4(%eax,%ecx)
30; CHECK-NEXT:    popl %esi
31; CHECK-NEXT:    popl %edi
32; CHECK-NEXT:    popl %ebx
33; CHECK-NEXT:    retl
34entry:
35  %0 = load <4 x i32>, ptr %y, align 16
36  %am = add <4 x i32> %a, %0
37  store <4 x i32> %am, ptr %y, align 16
38  %ip0 = shl nsw i32 %i, 2
39  %ip1 = or i32 %ip0, 1
40  %ip2 = or i32 %ip0, 2
41  %ip3 = or i32 %ip0, 3
42  %vecext = extractelement <4 x i32> %am, i32 %ip0
43  %arrayidx = getelementptr inbounds i32, ptr %x, i32 %ip3
44  store i32 %vecext, ptr %arrayidx, align 4
45  %vecext5 = extractelement <4 x i32> %am, i32 %ip1
46  %arrayidx8 = getelementptr inbounds i32, ptr %x, i32 %ip0
47  store i32 %vecext5, ptr %arrayidx8, align 4
48  %vecext11 = extractelement <4 x i32> %am, i32 %ip2
49  %arrayidx14 = getelementptr inbounds i32, ptr %x, i32 %ip2
50  store i32 %vecext11, ptr %arrayidx14, align 4
51  %vecext17 = extractelement <4 x i32> %am, i32 %ip3
52  %arrayidx20 = getelementptr inbounds i32, ptr %x, i32 %ip1
53  store i32 %vecext17, ptr %arrayidx20, align 4
54  ret void
55}
56
57attributes #0 = { nounwind }
58