1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2; RUN: llc < %s -mtriple=x86_64 | FileCheck %s 3 4define void @PR117684(i1 %cond, <8 x float> %vec, ptr %ptr1, ptr %ptr2) #0 { 5; CHECK-LABEL: PR117684: 6; CHECK: # %bb.0: 7; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1 8; CHECK-NEXT: vcmpnltps %ymm1, %ymm0, %k1 9; CHECK-NEXT: vbroadcastss {{.*#+}} xmm0 = [NaN,NaN,NaN,NaN] 10; CHECK-NEXT: vinsertf32x4 $0, %xmm0, %ymm0, %ymm0 {%k1} {z} 11; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1 12; CHECK-NEXT: vmulss %xmm1, %xmm0, %xmm0 13; CHECK-NEXT: vmulss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2 14; CHECK-NEXT: vbroadcastss %xmm2, %ymm2 15; CHECK-NEXT: testb $1, %dil 16; CHECK-NEXT: cmoveq %rdx, %rsi 17; CHECK-NEXT: vmovups %ymm2, (%rsi) 18; CHECK-NEXT: vmulss %xmm1, %xmm0, %xmm0 19; CHECK-NEXT: vbroadcastss %xmm0, %ymm0 20; CHECK-NEXT: vmovups %ymm0, (%rdx) 21; CHECK-NEXT: vzeroupper 22; CHECK-NEXT: retq 23 %cmp = fcmp olt <8 x float> %vec, zeroinitializer 24 %sel1 = select <8 x i1> %cmp, <8 x float> zeroinitializer, <8 x float> 25 <float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000, 26 float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000> 27 %fmul1 = fmul <8 x float> zeroinitializer, %sel1 28 %shuffle = shufflevector <8 x float> %fmul1, <8 x float> zeroinitializer, <8 x i32> zeroinitializer 29 %fmul2 = fmul <8 x float> %shuffle, 30 <float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000, 31 float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000, float 0x7FF8000000000000> 32 %sel2 = select i1 %cond, ptr %ptr1, ptr %ptr2 33 store <8 x float> %fmul2, ptr %sel2, align 4 34 %fmul3 = fmul <8 x float> %shuffle, zeroinitializer 35 store <8 x float> %fmul3, ptr %ptr2, align 4 36 ret void 37} 38 39attributes #0 = { "target-cpu"="skylake-avx512" } 40