xref: /llvm-project/llvm/test/CodeGen/X86/evex512-mem.ll (revision 58d4fe287e02dab99eec282917c67abbb36fc3e4)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=avx512f,avx512bw,avx512vl < %s | FileCheck %s --check-prefix=AVX512
3; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=avx512f,avx512bw,avx512vl,-evex512 < %s | FileCheck %s --check-prefix=AVX256
4
5define void @test1() {
6; AVX512-LABEL: test1:
7; AVX512:       # %bb.0:
8; AVX512-NEXT:    movq 64, %rax
9; AVX512-NEXT:    movq %rax, (%rax)
10; AVX512-NEXT:    vmovups 0, %zmm0
11; AVX512-NEXT:    vmovups %zmm0, (%rax)
12; AVX512-NEXT:    vzeroupper
13; AVX512-NEXT:    retq
14;
15; AVX256-LABEL: test1:
16; AVX256:       # %bb.0:
17; AVX256-NEXT:    movq 64, %rax
18; AVX256-NEXT:    movq %rax, (%rax)
19; AVX256-NEXT:    vmovups 0, %ymm0
20; AVX256-NEXT:    vmovups 32, %ymm1
21; AVX256-NEXT:    vmovups %ymm1, (%rax)
22; AVX256-NEXT:    vmovups %ymm0, (%rax)
23; AVX256-NEXT:    vzeroupper
24; AVX256-NEXT:    retq
25  call void @llvm.memcpy.p0.p0.i64(ptr align 8 poison, ptr align 8 null, i64 72, i1 false)
26  ret void
27}
28
29declare void @llvm.memcpy.p0.p0.i64(ptr, ptr, i64, i1)
30