1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2; RUN: llc %s -x86-early-ifcvt -pass-remarks='early-ifcvt' -pass-remarks-missed='early-ifcvt' -mcpu=k8 -o - 2>&1 | FileCheck %s 3target triple = "x86_64-none-none" 4 5; CHECK: remark: <unknown>:0:0: performing if-conversion on branch: 6; CHECK-SAME: the condition adds {{[0-9]+}} cycle{{s?}} to the critical path, 7; CHECK-SAME: and the short leg adds another {{[0-9]+}} cycles{{s?}}, 8; CHECK-SAME: and the long leg adds another {{[0-9]+}} cycles{{s?}}, 9; CHECK-SAME: each staying under the threshold of {{[0-9]+}} cycles{{s?}}. 10 11; CHECK: remark: <unknown>:0:0: did not if-convert branch: 12; CHECK-SAME: the condition would add {{[0-9]+}} cycles{{s?}} to the critical path, 13; CHECK-SAME: and the short leg would add another {{[0-9]+}} cycles{{s?}}, 14; CHECK-SAME: and the long leg would add another {{[0-9]+}} cycles{{s?}} exceeding the limit of {{[0-9]+}} cycles{{s?}}. 15 16; CHECK: remark: <unknown>:0:0: did not if-convert branch: 17; CHECK-SAME: the resulting critical path ({{[0-9]+}} cycles{{s?}}) 18; CHECK-SAME: would extend the shorter leg's critical path ({{[0-9]+}} cycle{{s?}}) 19; CHECK-SAME: by more than the threshold of {{[0-9]+}} cycles{{s?}}, 20; CHECK-SAME: which cannot be hidden by available ILP. 21 22define i32 @mm1(i1 %pred, i32 %val) { 23; CHECK-LABEL: mm1: 24; CHECK: # %bb.0: # %entry 25; CHECK-NEXT: # kill: def $esi killed $esi def $rsi 26; CHECK-NEXT: leal 1(%rsi), %eax 27; CHECK-NEXT: testb $1, %dil 28; CHECK-NEXT: cmovel %esi, %eax 29; CHECK-NEXT: retq 30entry: 31 br i1 %pred, label %if.true, label %if.else 32 33if.true: 34 %v1 = add i32 1, %val 35 br label %if.else 36 37if.else: 38 %res = phi i32 [ %val, %entry ], [ %v1, %if.true ] 39 ret i32 %res 40} 41 42define i32 @mm2(i1 %pred, i32 %val, i32 %e1, i32 %e2, i32 %e3, i32 %e4, i32 %e5) { 43; CHECK-LABEL: mm2: 44; CHECK: # %bb.0: # %entry 45; CHECK-NEXT: movl %esi, %eax 46; CHECK-NEXT: testb $1, %dil 47; CHECK-NEXT: je .LBB1_2 48; CHECK-NEXT: # %bb.1: # %if.true 49; CHECK-NEXT: addl %eax, %edx 50; CHECK-NEXT: addl %ecx, %r8d 51; CHECK-NEXT: addl %edx, %r8d 52; CHECK-NEXT: addl %r8d, %r9d 53; CHECK-NEXT: movl %r9d, %eax 54; CHECK-NEXT: .LBB1_2: # %if.else 55; CHECK-NEXT: retq 56entry: 57 br i1 %pred, label %if.true, label %if.else 58 59if.true: 60 %v1 = add i32 %e1, %val 61 %v2 = add i32 %e2, %v1 62 %v3 = add i32 %e3, %v2 63 %v4 = add i32 %e4, %v3 64 br label %if.else 65 66if.else: 67 %res = phi i32 [ %val, %entry ], [ %v4, %if.true ] 68 ret i32 %res 69} 70 71define i64 @mm3(i1 %pred, i64 %val, i64 %e1, i128 %e2, i128 %e3, i128 %e4, i128 %e5) { 72; CHECK-LABEL: mm3: 73; CHECK: # %bb.0: # %entry 74; CHECK-NEXT: movq %rsi, %rax 75; CHECK-NEXT: testb $1, %dil 76; CHECK-NEXT: movq %rsi, %r10 77; CHECK-NEXT: jne .LBB2_2 78; CHECK-NEXT: # %bb.1: # %if.false 79; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rsi 80; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rdi 81; CHECK-NEXT: imulq %rdx, %rdx 82; CHECK-NEXT: movq %rdx, %r10 83; CHECK-NEXT: sarq $63, %r10 84; CHECK-NEXT: movq %rcx, %rax 85; CHECK-NEXT: movq %rdx, %r9 86; CHECK-NEXT: mulq %rdx 87; CHECK-NEXT: imulq %rcx, %r10 88; CHECK-NEXT: imulq %r9, %r8 89; CHECK-NEXT: addq %rdx, %r8 90; CHECK-NEXT: addq %r10, %r8 91; CHECK-NEXT: addq {{[0-9]+}}(%rsp), %rax 92; CHECK-NEXT: adcq {{[0-9]+}}(%rsp), %r8 93; CHECK-NEXT: xorq {{[0-9]+}}(%rsp), %rdi 94; CHECK-NEXT: xorq %r8, %rdi 95; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %r10 96; CHECK-NEXT: xorq %rsi, %r10 97; CHECK-NEXT: xorq %rax, %r10 98; CHECK-NEXT: movq %rdi, %rax 99; CHECK-NEXT: movl %esi, %ecx 100; CHECK-NEXT: sarq %cl, %rax 101; CHECK-NEXT: addq %rdi, %rdi 102; CHECK-NEXT: notb %cl 103; CHECK-NEXT: shlq %cl, %rdi 104; CHECK-NEXT: movl %esi, %ecx 105; CHECK-NEXT: shrq %cl, %r10 106; CHECK-NEXT: orq %rdi, %r10 107; CHECK-NEXT: testb $64, %sil 108; CHECK-NEXT: cmovneq %rax, %r10 109; CHECK-NEXT: movq %r9, %rax 110; CHECK-NEXT: .LBB2_2: # %if.endif 111; CHECK-NEXT: addq %r10, %rax 112; CHECK-NEXT: retq 113entry: 114 br i1 %pred, label %if.true, label %if.false 115 116if.true: 117 br label %if.endif 118 119if.false: 120 %f1 = mul i64 %e1, %e1 121 %f3 = sext i64 %f1 to i128 122 %f4 = mul i128 %e2, %f3 123 %f6 = add i128 %e3, %f4 124 %f7 = xor i128 %e4, %f6 125 %f8 = xor i128 %e5, %f7 126 %a1 = ashr i128 %f8, %e5 127 %f5 = trunc i128 %a1 to i64 128 br label %if.endif 129 130if.endif: 131 %r1 = phi i64 [ %val, %if.true ], [ %f1, %if.false ] 132 %r2 = phi i64 [ %val, %if.true ], [ %f5, %if.false ] 133 %res = add i64 %r1, %r2 134 ret i64 %res 135} 136