1; RUN: llc -mtriple=x86_64-apple-darwin -stop-after finalize-isel <%s | FileCheck %s 2 3; Check that the callee excludes the return register (%rax) from the list of 4; callee-saved-registers. 5define preserve_mostcc i64 @callee1(i64 %a0, i64 %b0, i64 %c0, i64 %d0, i64 %e0) nounwind { 6 %a1 = mul i64 %a0, %b0 7 %a2 = mul i64 %a1, %c0 8 %a3 = mul i64 %a2, %d0 9 %a4 = mul i64 %a3, %e0 10 ret i64 %a4 11} 12; CHECK: name: callee1 13; CHECK: calleeSavedRegisters: [ '$rbx', '$r12', '$r13', '$r14', '$r15', '$rbp', 14; CHECK: '$rcx', '$rdx', '$rsi', '$rdi', '$r8', '$r9', '$r10' ] 15; CHECK: RET 0, $rax 16 17; Check that RegMask contains parameter registers (%rdi, %rsi, %rdx, %rcx, 18; %r8), but doesn't contain the return register (%rax). 19define i64 @caller1(i64 %a0) nounwind { 20 %b1 = call preserve_mostcc i64 @callee1(i64 %a0, i64 %a0, i64 %a0, i64 %a0, i64 %a0) 21 %b2 = add i64 %b1, %a0 22 ret i64 %b2 23} 24; CHECK: name: caller1 25; CHECK: CALL64pcrel32 @callee1, CustomRegMask($bh,$bl,$bp,$bph,$bpl,$bx,$ch,$cl,$cx,$dh,$di,$dih,$dil,$dl,$dx,$ebp,$ebx,$ecx,$edi,$edx,$esi,$hbp,$hbx,$hcx,$hdi,$hdx,$hsi,$rbp,$rbx,$rcx,$rdi,$rdx,$rsi,$si,$sih,$sil,$r8,$r9,$r10,$r12,$r13,$r14,$r15,$r8b,$r9b,$r10b,$r12b,$r13b,$r14b,$r15b,$r8bh,$r9bh,$r10bh,$r12bh,$r13bh,$r14bh,$r15bh,$r8d,$r9d,$r10d,$r12d,$r13d,$r14d,$r15d,$r8w,$r9w,$r10w,$r12w,$r13w,$r14w,$r15w,$r8wh,$r9wh,$r10wh,$r12wh,$r13wh,$r14wh,$r15wh), implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, implicit $rdx, implicit $rcx, implicit $r8, implicit-def $rsp, implicit-def $ssp, implicit-def $rax 26; CHECK: RET 0, $rax 27 28 29; Check that the callee excludes the return registers (%rax, %rdx) from the list 30; of callee-saved-registers. 31define preserve_mostcc {i64, i64} @callee2(i64 %a0, i64 %b0, i64 %c0, i64 %d0, i64 %e0) nounwind { 32 %a1 = mul i64 %a0, %b0 33 %a2 = mul i64 %a1, %c0 34 %a3 = mul i64 %a2, %d0 35 %a4 = mul i64 %a3, %e0 36 %b4 = insertvalue {i64, i64} undef, i64 %a3, 0 37 %b5 = insertvalue {i64, i64} %b4, i64 %a4, 1 38 ret {i64, i64} %b5 39} 40; CHECK: name: callee2 41; CHECK: calleeSavedRegisters: [ '$rbx', '$r12', '$r13', '$r14', '$r15', '$rbp', 42; CHECK: '$rcx', '$rsi', '$rdi', '$r8', '$r9', '$r10' ] 43; CHECK: RET 0, $rax, $rdx 44 45 46; Check that RegMask contains parameter registers (%rdi, %rsi, %rdx, %rcx, 47; %r8), but doesn't contain the return registers (%rax, %rdx). 48define {i64, i64} @caller2(i64 %a0) nounwind { 49 %b1 = call preserve_mostcc {i64, i64} @callee2(i64 %a0, i64 %a0, i64 %a0, i64 %a0, i64 %a0) 50 ret {i64, i64} %b1 51} 52; CHECK: name: caller2 53; CHECK: CALL64pcrel32 @callee2, CustomRegMask($bh,$bl,$bp,$bph,$bpl,$bx,$ch,$cl,$cx,$di,$dih,$dil,$ebp,$ebx,$ecx,$edi,$esi,$hbp,$hbx,$hcx,$hdi,$hsi,$rbp,$rbx,$rcx,$rdi,$rsi,$si,$sih,$sil,$r8,$r9,$r10,$r12,$r13,$r14,$r15,$r8b,$r9b,$r10b,$r12b,$r13b,$r14b,$r15b,$r8bh,$r9bh,$r10bh,$r12bh,$r13bh,$r14bh,$r15bh,$r8d,$r9d,$r10d,$r12d,$r13d,$r14d,$r15d,$r8w,$r9w,$r10w,$r12w,$r13w,$r14w,$r15w,$r8wh,$r9wh,$r10wh,$r12wh,$r13wh,$r14wh,$r15wh), implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, implicit $rdx, implicit $rcx, implicit $r8, implicit-def $rsp, implicit-def $ssp, implicit-def $rax, implicit-def $rdx 54; CHECK: RET 0, $rax, $rdx 55 56 57%struct.Large = type { i64, double, double } 58 59; Declare the callee with a sret parameter. 60declare preserve_mostcc void @callee3(ptr noalias nocapture writeonly sret(%struct.Large) align 4 %a0, i64 %b0) nounwind; 61 62; Check that RegMask contains %rax and subregisters. 63define void @caller3(i64 %a0) nounwind { 64 %a1 = alloca %struct.Large, align 8 65 call preserve_mostcc void @callee3(ptr nonnull sret(%struct.Large) align 8 %a1, i64 %a0) 66 ret void 67} 68; CHECK: name: caller3 69; CHECK: CALL64pcrel32 @callee3, CustomRegMask($ah,$al,$ax,$bh,$bl,$bp,$bph,$bpl,$bx,$ch,$cl,$cx,$dh,$di,$dih,$dil,$dl,$dx,$eax,$ebp,$ebx,$ecx,$edi,$edx,$esi,$hax,$hbp,$hbx,$hcx,$hdi,$hdx,$hsi,$rax,$rbp,$rbx,$rcx,$rdi,$rdx,$rsi,$si,$sih,$sil,$r8,$r9,$r10,$r12,$r13,$r14,$r15,$r8b,$r9b,$r10b,$r12b,$r13b,$r14b,$r15b,$r8bh,$r9bh,$r10bh,$r12bh,$r13bh,$r14bh,$r15bh,$r8d,$r9d,$r10d,$r12d,$r13d,$r14d,$r15d,$r8w,$r9w,$r10w,$r12w,$r13w,$r14w,$r15w,$r8wh,$r9wh,$r10wh,$r12wh,$r13wh,$r14wh,$r15wh), implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, implicit-def $rsp, implicit-def $ssp 70; CHECK: RET 0 71