xref: /llvm-project/llvm/test/CodeGen/X86/dag-combine-counter.ll (revision d46e37348ec3f8054b10bcbbe7c11149d7f61031)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2; RUN: llc -mtriple=x86_64-- -debug-counter=dagcombine=0-5 < %s | FileCheck %s
3
4; REQUIRES: asserts
5
6define i32 @test(i32 %x) {
7; CHECK-LABEL: test:
8; CHECK:       # %bb.0:
9; CHECK-NEXT:    movl %edi, %eax
10; CHECK-NEXT:    retq
11  %y = add i32 %x, 1
12  %z = sub i32 %y, 1
13  ret i32 %z
14}
15
16define i32 @test2(i32 %x) {
17; CHECK-LABEL: test2:
18; CHECK:       # %bb.0:
19; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
20; CHECK-NEXT:    leal 1(%rdi), %eax
21; CHECK-NEXT:    subl $1, %eax
22; CHECK-NEXT:    retq
23  %y = add i32 %x, 1
24  %z = sub i32 %y, 1
25  ret i32 %z
26}
27