xref: /llvm-project/llvm/test/CodeGen/X86/conditional-indecrement.ll (revision 2d0f20cc043458c945e4959c5b130c07a7f5b8b5) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
3
4define i32 @test1(i32 %a, i32 %b) nounwind readnone {
5; CHECK-LABEL: test1:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    movl %esi, %eax
8; CHECK-NEXT:    cmpl $1, %edi
9; CHECK-NEXT:    sbbl $-1, %eax
10; CHECK-NEXT:    retq
11  %not.cmp = icmp ne i32 %a, 0
12  %inc = zext i1 %not.cmp to i32
13  %retval.0 = add i32 %inc, %b
14  ret i32 %retval.0
15}
16
17define i32 @test1_commute(i32 %a, i32 %b) nounwind readnone {
18; CHECK-LABEL: test1_commute:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    movl %esi, %eax
21; CHECK-NEXT:    cmpl $1, %edi
22; CHECK-NEXT:    sbbl $-1, %eax
23; CHECK-NEXT:    retq
24  %cmp = icmp ne i32 %a, 0
25  %inc = zext i1 %cmp to i32
26  %ret = add i32 %b, %inc
27  ret i32 %ret
28}
29
30define i32 @test2(i32 %a, i32 %b) nounwind readnone {
31; CHECK-LABEL: test2:
32; CHECK:       # %bb.0:
33; CHECK-NEXT:    movl %esi, %eax
34; CHECK-NEXT:    cmpl $1, %edi
35; CHECK-NEXT:    adcl $0, %eax
36; CHECK-NEXT:    retq
37  %cmp = icmp eq i32 %a, 0
38  %inc = zext i1 %cmp to i32
39  %retval.0 = add i32 %inc, %b
40  ret i32 %retval.0
41}
42
43define i32 @test3(i32 %a, i32 %b) nounwind readnone {
44; CHECK-LABEL: test3:
45; CHECK:       # %bb.0:
46; CHECK-NEXT:    movl %esi, %eax
47; CHECK-NEXT:    cmpl $1, %edi
48; CHECK-NEXT:    adcl $0, %eax
49; CHECK-NEXT:    retq
50  %cmp = icmp eq i32 %a, 0
51  %inc = zext i1 %cmp to i32
52  %retval.0 = add i32 %inc, %b
53  ret i32 %retval.0
54}
55
56define i32 @test4(i32 %a, i32 %b) nounwind readnone {
57; CHECK-LABEL: test4:
58; CHECK:       # %bb.0:
59; CHECK-NEXT:    movl %esi, %eax
60; CHECK-NEXT:    cmpl $1, %edi
61; CHECK-NEXT:    sbbl $-1, %eax
62; CHECK-NEXT:    retq
63  %not.cmp = icmp ne i32 %a, 0
64  %inc = zext i1 %not.cmp to i32
65  %retval.0 = add i32 %inc, %b
66  ret i32 %retval.0
67}
68
69define i32 @test5(i32 %a, i32 %b) nounwind readnone {
70; CHECK-LABEL: test5:
71; CHECK:       # %bb.0:
72; CHECK-NEXT:    movl %esi, %eax
73; CHECK-NEXT:    cmpl $1, %edi
74; CHECK-NEXT:    adcl $-1, %eax
75; CHECK-NEXT:    retq
76  %not.cmp = icmp ne i32 %a, 0
77  %inc = zext i1 %not.cmp to i32
78  %retval.0 = sub i32 %b, %inc
79  ret i32 %retval.0
80}
81
82define i32 @test6(i32 %a, i32 %b) nounwind readnone {
83; CHECK-LABEL: test6:
84; CHECK:       # %bb.0:
85; CHECK-NEXT:    movl %esi, %eax
86; CHECK-NEXT:    cmpl $1, %edi
87; CHECK-NEXT:    sbbl $0, %eax
88; CHECK-NEXT:    retq
89  %cmp = icmp eq i32 %a, 0
90  %inc = zext i1 %cmp to i32
91  %retval.0 = sub i32 %b, %inc
92  ret i32 %retval.0
93}
94
95define i32 @test7(i32 %a, i32 %b) nounwind readnone {
96; CHECK-LABEL: test7:
97; CHECK:       # %bb.0:
98; CHECK-NEXT:    movl %esi, %eax
99; CHECK-NEXT:    cmpl $1, %edi
100; CHECK-NEXT:    sbbl $0, %eax
101; CHECK-NEXT:    retq
102  %cmp = icmp eq i32 %a, 0
103  %inc = zext i1 %cmp to i32
104  %retval.0 = sub i32 %b, %inc
105  ret i32 %retval.0
106}
107
108define i32 @test8(i32 %a, i32 %b) nounwind readnone {
109; CHECK-LABEL: test8:
110; CHECK:       # %bb.0:
111; CHECK-NEXT:    movl %esi, %eax
112; CHECK-NEXT:    cmpl $1, %edi
113; CHECK-NEXT:    adcl $-1, %eax
114; CHECK-NEXT:    retq
115  %not.cmp = icmp ne i32 %a, 0
116  %inc = zext i1 %not.cmp to i32
117  %retval.0 = sub i32 %b, %inc
118  ret i32 %retval.0
119}
120