xref: /llvm-project/llvm/test/CodeGen/X86/comi-flags.ll (revision f5ad9e1ca582216010d07e7b0ca2f3e77f71c859) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=SSE
3; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx  | FileCheck %s --check-prefixes=AVX,NO-AVX10_2
4; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx10.2-256 | FileCheck %s --check-prefixes=AVX,AVX10_2
5
6;
7; SSE
8;
9
10define i32 @test_x86_sse_comieq_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2, i32 %a3) {
11; SSE-LABEL: test_x86_sse_comieq_ss:
12; SSE:       # %bb.0:
13; SSE-NEXT:    movl %edi, %eax
14; SSE-NEXT:    comiss %xmm1, %xmm0
15; SSE-NEXT:    setnp %cl
16; SSE-NEXT:    sete %dl
17; SSE-NEXT:    testb %cl, %dl
18; SSE-NEXT:    cmovnel %esi, %eax
19; SSE-NEXT:    retq
20;
21; NO-AVX10_2-LABEL: test_x86_sse_comieq_ss:
22; NO-AVX10_2:       # %bb.0:
23; NO-AVX10_2-NEXT:    movl %edi, %eax
24; NO-AVX10_2-NEXT:    vcomiss %xmm1, %xmm0
25; NO-AVX10_2-NEXT:    setnp %cl
26; NO-AVX10_2-NEXT:    sete %dl
27; NO-AVX10_2-NEXT:    testb %cl, %dl
28; NO-AVX10_2-NEXT:    cmovnel %esi, %eax
29; NO-AVX10_2-NEXT:    retq
30;
31; AVX10_2-LABEL: test_x86_sse_comieq_ss:
32; AVX10_2:       # %bb.0:
33; AVX10_2-NEXT:    movl %edi, %eax
34; AVX10_2-NEXT:    vcomxss %xmm1, %xmm0
35; AVX10_2-NEXT:    cmovel %esi, %eax
36; AVX10_2-NEXT:    retq
37  %call = call i32 @llvm.x86.sse.comieq.ss(<4 x float> %a0, <4 x float> %a1)
38  %cmp = icmp eq i32 %call, 0
39  %res = select i1 %cmp, i32 %a2, i32 %a3
40  ret i32 %res
41}
42declare i32 @llvm.x86.sse.comieq.ss(<4 x float>, <4 x float>) nounwind readnone
43
44define i32 @test_x86_sse_comige_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2, i32 %a3) {
45; SSE-LABEL: test_x86_sse_comige_ss:
46; SSE:       # %bb.0:
47; SSE-NEXT:    movl %edi, %eax
48; SSE-NEXT:    comiss %xmm1, %xmm0
49; SSE-NEXT:    cmovbl %esi, %eax
50; SSE-NEXT:    retq
51;
52; AVX-LABEL: test_x86_sse_comige_ss:
53; AVX:       # %bb.0:
54; AVX-NEXT:    movl %edi, %eax
55; AVX-NEXT:    vcomiss %xmm1, %xmm0
56; AVX-NEXT:    cmovbl %esi, %eax
57; AVX-NEXT:    retq
58  %call = call i32 @llvm.x86.sse.comige.ss(<4 x float> %a0, <4 x float> %a1)
59  %cmp = icmp ne i32 %call, 0
60  %res = select i1 %cmp, i32 %a2, i32 %a3
61  ret i32 %res
62}
63declare i32 @llvm.x86.sse.comige.ss(<4 x float>, <4 x float>) nounwind readnone
64
65define i32 @test_x86_sse_comigt_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2, i32 %a3) {
66; SSE-LABEL: test_x86_sse_comigt_ss:
67; SSE:       # %bb.0:
68; SSE-NEXT:    movl %edi, %eax
69; SSE-NEXT:    comiss %xmm1, %xmm0
70; SSE-NEXT:    cmoval %esi, %eax
71; SSE-NEXT:    retq
72;
73; AVX-LABEL: test_x86_sse_comigt_ss:
74; AVX:       # %bb.0:
75; AVX-NEXT:    movl %edi, %eax
76; AVX-NEXT:    vcomiss %xmm1, %xmm0
77; AVX-NEXT:    cmoval %esi, %eax
78; AVX-NEXT:    retq
79  %call = call i32 @llvm.x86.sse.comigt.ss(<4 x float> %a0, <4 x float> %a1)
80  %cmp = icmp eq i32 %call, 0
81  %res = select i1 %cmp, i32 %a2, i32 %a3
82  ret i32 %res
83}
84declare i32 @llvm.x86.sse.comigt.ss(<4 x float>, <4 x float>) nounwind readnone
85
86define i32 @test_x86_sse_comile_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2, i32 %a3) {
87; SSE-LABEL: test_x86_sse_comile_ss:
88; SSE:       # %bb.0:
89; SSE-NEXT:    movl %edi, %eax
90; SSE-NEXT:    comiss %xmm0, %xmm1
91; SSE-NEXT:    cmovbl %esi, %eax
92; SSE-NEXT:    retq
93;
94; AVX-LABEL: test_x86_sse_comile_ss:
95; AVX:       # %bb.0:
96; AVX-NEXT:    movl %edi, %eax
97; AVX-NEXT:    vcomiss %xmm0, %xmm1
98; AVX-NEXT:    cmovbl %esi, %eax
99; AVX-NEXT:    retq
100  %call = call i32 @llvm.x86.sse.comile.ss(<4 x float> %a0, <4 x float> %a1)
101  %cmp = icmp ne i32 %call, 0
102  %res = select i1 %cmp, i32 %a2, i32 %a3
103  ret i32 %res
104}
105declare i32 @llvm.x86.sse.comile.ss(<4 x float>, <4 x float>) nounwind readnone
106
107define i32 @test_x86_sse_comilt_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2, i32 %a3) {
108; SSE-LABEL: test_x86_sse_comilt_ss:
109; SSE:       # %bb.0:
110; SSE-NEXT:    movl %edi, %eax
111; SSE-NEXT:    comiss %xmm0, %xmm1
112; SSE-NEXT:    cmoval %esi, %eax
113; SSE-NEXT:    retq
114;
115; AVX-LABEL: test_x86_sse_comilt_ss:
116; AVX:       # %bb.0:
117; AVX-NEXT:    movl %edi, %eax
118; AVX-NEXT:    vcomiss %xmm0, %xmm1
119; AVX-NEXT:    cmoval %esi, %eax
120; AVX-NEXT:    retq
121  %call = call i32 @llvm.x86.sse.comilt.ss(<4 x float> %a0, <4 x float> %a1)
122  %cmp = icmp eq i32 %call, 0
123  %res = select i1 %cmp, i32 %a2, i32 %a3
124  ret i32 %res
125}
126declare i32 @llvm.x86.sse.comilt.ss(<4 x float>, <4 x float>) nounwind readnone
127
128define i32 @test_x86_sse_comineq_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2, i32 %a3) {
129; SSE-LABEL: test_x86_sse_comineq_ss:
130; SSE:       # %bb.0:
131; SSE-NEXT:    movl %esi, %eax
132; SSE-NEXT:    comiss %xmm1, %xmm0
133; SSE-NEXT:    cmovnel %edi, %eax
134; SSE-NEXT:    cmovpl %edi, %eax
135; SSE-NEXT:    retq
136;
137; NO-AVX10_2-LABEL: test_x86_sse_comineq_ss:
138; NO-AVX10_2:       # %bb.0:
139; NO-AVX10_2-NEXT:    movl %esi, %eax
140; NO-AVX10_2-NEXT:    vcomiss %xmm1, %xmm0
141; NO-AVX10_2-NEXT:    cmovnel %edi, %eax
142; NO-AVX10_2-NEXT:    cmovpl %edi, %eax
143; NO-AVX10_2-NEXT:    retq
144;
145; AVX10_2-LABEL: test_x86_sse_comineq_ss:
146; AVX10_2:       # %bb.0:
147; AVX10_2-NEXT:    movl %edi, %eax
148; AVX10_2-NEXT:    vcomxss %xmm1, %xmm0
149; AVX10_2-NEXT:    cmovel %esi, %eax
150; AVX10_2-NEXT:    retq
151  %call = call i32 @llvm.x86.sse.comineq.ss(<4 x float> %a0, <4 x float> %a1)
152  %cmp = icmp ne i32 %call, 0
153  %res = select i1 %cmp, i32 %a2, i32 %a3
154  ret i32 %res
155}
156declare i32 @llvm.x86.sse.comineq.ss(<4 x float>, <4 x float>) nounwind readnone
157
158define i32 @test_x86_sse_ucomieq_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2, i32 %a3) {
159; SSE-LABEL: test_x86_sse_ucomieq_ss:
160; SSE:       # %bb.0:
161; SSE-NEXT:    movl %edi, %eax
162; SSE-NEXT:    ucomiss %xmm1, %xmm0
163; SSE-NEXT:    setnp %cl
164; SSE-NEXT:    sete %dl
165; SSE-NEXT:    testb %cl, %dl
166; SSE-NEXT:    cmovnel %esi, %eax
167; SSE-NEXT:    retq
168;
169; NO-AVX10_2-LABEL: test_x86_sse_ucomieq_ss:
170; NO-AVX10_2:       # %bb.0:
171; NO-AVX10_2-NEXT:    movl %edi, %eax
172; NO-AVX10_2-NEXT:    vucomiss %xmm1, %xmm0
173; NO-AVX10_2-NEXT:    setnp %cl
174; NO-AVX10_2-NEXT:    sete %dl
175; NO-AVX10_2-NEXT:    testb %cl, %dl
176; NO-AVX10_2-NEXT:    cmovnel %esi, %eax
177; NO-AVX10_2-NEXT:    retq
178;
179; AVX10_2-LABEL: test_x86_sse_ucomieq_ss:
180; AVX10_2:       # %bb.0:
181; AVX10_2-NEXT:    movl %edi, %eax
182; AVX10_2-NEXT:    vucomxss %xmm1, %xmm0
183; AVX10_2-NEXT:    cmovel %esi, %eax
184; AVX10_2-NEXT:    retq
185  %call = call i32 @llvm.x86.sse.ucomieq.ss(<4 x float> %a0, <4 x float> %a1)
186  %cmp = icmp eq i32 %call, 0
187  %res = select i1 %cmp, i32 %a2, i32 %a3
188  ret i32 %res
189}
190declare i32 @llvm.x86.sse.ucomieq.ss(<4 x float>, <4 x float>) nounwind readnone
191
192define i32 @test_x86_sse_ucomige_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2, i32 %a3) {
193; SSE-LABEL: test_x86_sse_ucomige_ss:
194; SSE:       # %bb.0:
195; SSE-NEXT:    movl %edi, %eax
196; SSE-NEXT:    ucomiss %xmm1, %xmm0
197; SSE-NEXT:    cmovbl %esi, %eax
198; SSE-NEXT:    retq
199;
200; AVX-LABEL: test_x86_sse_ucomige_ss:
201; AVX:       # %bb.0:
202; AVX-NEXT:    movl %edi, %eax
203; AVX-NEXT:    vucomiss %xmm1, %xmm0
204; AVX-NEXT:    cmovbl %esi, %eax
205; AVX-NEXT:    retq
206  %call = call i32 @llvm.x86.sse.ucomige.ss(<4 x float> %a0, <4 x float> %a1)
207  %cmp = icmp ne i32 %call, 0
208  %res = select i1 %cmp, i32 %a2, i32 %a3
209  ret i32 %res
210}
211declare i32 @llvm.x86.sse.ucomige.ss(<4 x float>, <4 x float>) nounwind readnone
212
213define i32 @test_x86_sse_ucomigt_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2, i32 %a3) {
214; SSE-LABEL: test_x86_sse_ucomigt_ss:
215; SSE:       # %bb.0:
216; SSE-NEXT:    movl %edi, %eax
217; SSE-NEXT:    ucomiss %xmm1, %xmm0
218; SSE-NEXT:    cmoval %esi, %eax
219; SSE-NEXT:    retq
220;
221; AVX-LABEL: test_x86_sse_ucomigt_ss:
222; AVX:       # %bb.0:
223; AVX-NEXT:    movl %edi, %eax
224; AVX-NEXT:    vucomiss %xmm1, %xmm0
225; AVX-NEXT:    cmoval %esi, %eax
226; AVX-NEXT:    retq
227  %call = call i32 @llvm.x86.sse.ucomigt.ss(<4 x float> %a0, <4 x float> %a1)
228  %cmp = icmp eq i32 %call, 0
229  %res = select i1 %cmp, i32 %a2, i32 %a3
230  ret i32 %res
231}
232declare i32 @llvm.x86.sse.ucomigt.ss(<4 x float>, <4 x float>) nounwind readnone
233
234define i32 @test_x86_sse_ucomile_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2, i32 %a3) {
235; SSE-LABEL: test_x86_sse_ucomile_ss:
236; SSE:       # %bb.0:
237; SSE-NEXT:    movl %edi, %eax
238; SSE-NEXT:    ucomiss %xmm0, %xmm1
239; SSE-NEXT:    cmovbl %esi, %eax
240; SSE-NEXT:    retq
241;
242; AVX-LABEL: test_x86_sse_ucomile_ss:
243; AVX:       # %bb.0:
244; AVX-NEXT:    movl %edi, %eax
245; AVX-NEXT:    vucomiss %xmm0, %xmm1
246; AVX-NEXT:    cmovbl %esi, %eax
247; AVX-NEXT:    retq
248  %call = call i32 @llvm.x86.sse.ucomile.ss(<4 x float> %a0, <4 x float> %a1)
249  %cmp = icmp ne i32 %call, 0
250  %res = select i1 %cmp, i32 %a2, i32 %a3
251  ret i32 %res
252}
253declare i32 @llvm.x86.sse.ucomile.ss(<4 x float>, <4 x float>) nounwind readnone
254
255define i32 @test_x86_sse_ucomilt_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2, i32 %a3) {
256; SSE-LABEL: test_x86_sse_ucomilt_ss:
257; SSE:       # %bb.0:
258; SSE-NEXT:    movl %edi, %eax
259; SSE-NEXT:    ucomiss %xmm0, %xmm1
260; SSE-NEXT:    cmoval %esi, %eax
261; SSE-NEXT:    retq
262;
263; AVX-LABEL: test_x86_sse_ucomilt_ss:
264; AVX:       # %bb.0:
265; AVX-NEXT:    movl %edi, %eax
266; AVX-NEXT:    vucomiss %xmm0, %xmm1
267; AVX-NEXT:    cmoval %esi, %eax
268; AVX-NEXT:    retq
269  %call = call i32 @llvm.x86.sse.ucomilt.ss(<4 x float> %a0, <4 x float> %a1)
270  %cmp = icmp eq i32 %call, 0
271  %res = select i1 %cmp, i32 %a2, i32 %a3
272  ret i32 %res
273}
274declare i32 @llvm.x86.sse.ucomilt.ss(<4 x float>, <4 x float>) nounwind readnone
275
276define i32 @test_x86_sse_ucomineq_ss(<4 x float> %a0, <4 x float> %a1, i32 %a2, i32 %a3) {
277; SSE-LABEL: test_x86_sse_ucomineq_ss:
278; SSE:       # %bb.0:
279; SSE-NEXT:    movl %esi, %eax
280; SSE-NEXT:    ucomiss %xmm1, %xmm0
281; SSE-NEXT:    cmovnel %edi, %eax
282; SSE-NEXT:    cmovpl %edi, %eax
283; SSE-NEXT:    retq
284;
285; NO-AVX10_2-LABEL: test_x86_sse_ucomineq_ss:
286; NO-AVX10_2:       # %bb.0:
287; NO-AVX10_2-NEXT:    movl %esi, %eax
288; NO-AVX10_2-NEXT:    vucomiss %xmm1, %xmm0
289; NO-AVX10_2-NEXT:    cmovnel %edi, %eax
290; NO-AVX10_2-NEXT:    cmovpl %edi, %eax
291; NO-AVX10_2-NEXT:    retq
292;
293; AVX10_2-LABEL: test_x86_sse_ucomineq_ss:
294; AVX10_2:       # %bb.0:
295; AVX10_2-NEXT:    movl %edi, %eax
296; AVX10_2-NEXT:    vucomxss %xmm1, %xmm0
297; AVX10_2-NEXT:    cmovel %esi, %eax
298; AVX10_2-NEXT:    retq
299  %call = call i32 @llvm.x86.sse.ucomineq.ss(<4 x float> %a0, <4 x float> %a1)
300  %cmp = icmp ne i32 %call, 0
301  %res = select i1 %cmp, i32 %a2, i32 %a3
302  ret i32 %res
303}
304declare i32 @llvm.x86.sse.ucomineq.ss(<4 x float>, <4 x float>) nounwind readnone
305
306;
307; SSE2
308;
309
310define i32 @test_x86_sse2_comieq_sd(<2 x double> %a0, <2 x double> %a1, i32 %a2, i32 %a3) {
311; SSE-LABEL: test_x86_sse2_comieq_sd:
312; SSE:       # %bb.0:
313; SSE-NEXT:    movl %edi, %eax
314; SSE-NEXT:    comisd %xmm1, %xmm0
315; SSE-NEXT:    setnp %cl
316; SSE-NEXT:    sete %dl
317; SSE-NEXT:    testb %cl, %dl
318; SSE-NEXT:    cmovnel %esi, %eax
319; SSE-NEXT:    retq
320;
321; NO-AVX10_2-LABEL: test_x86_sse2_comieq_sd:
322; NO-AVX10_2:       # %bb.0:
323; NO-AVX10_2-NEXT:    movl %edi, %eax
324; NO-AVX10_2-NEXT:    vcomisd %xmm1, %xmm0
325; NO-AVX10_2-NEXT:    setnp %cl
326; NO-AVX10_2-NEXT:    sete %dl
327; NO-AVX10_2-NEXT:    testb %cl, %dl
328; NO-AVX10_2-NEXT:    cmovnel %esi, %eax
329; NO-AVX10_2-NEXT:    retq
330;
331; AVX10_2-LABEL: test_x86_sse2_comieq_sd:
332; AVX10_2:       # %bb.0:
333; AVX10_2-NEXT:    movl %edi, %eax
334; AVX10_2-NEXT:    vcomxsd %xmm1, %xmm0
335; AVX10_2-NEXT:    cmovel %esi, %eax
336; AVX10_2-NEXT:    retq
337  %call = call i32 @llvm.x86.sse2.comieq.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
338  %cmp = icmp eq i32 %call, 0
339  %res = select i1 %cmp, i32 %a2, i32 %a3
340  ret i32 %res
341}
342declare i32 @llvm.x86.sse2.comieq.sd(<2 x double>, <2 x double>) nounwind readnone
343
344define i32 @test_x86_sse2_comige_sd(<2 x double> %a0, <2 x double> %a1, i32 %a2, i32 %a3) {
345; SSE-LABEL: test_x86_sse2_comige_sd:
346; SSE:       # %bb.0:
347; SSE-NEXT:    movl %edi, %eax
348; SSE-NEXT:    comisd %xmm1, %xmm0
349; SSE-NEXT:    cmovbl %esi, %eax
350; SSE-NEXT:    retq
351;
352; AVX-LABEL: test_x86_sse2_comige_sd:
353; AVX:       # %bb.0:
354; AVX-NEXT:    movl %edi, %eax
355; AVX-NEXT:    vcomisd %xmm1, %xmm0
356; AVX-NEXT:    cmovbl %esi, %eax
357; AVX-NEXT:    retq
358  %call = call i32 @llvm.x86.sse2.comige.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
359  %cmp = icmp ne i32 %call, 0
360  %res = select i1 %cmp, i32 %a2, i32 %a3
361  ret i32 %res
362}
363declare i32 @llvm.x86.sse2.comige.sd(<2 x double>, <2 x double>) nounwind readnone
364
365define i32 @test_x86_sse2_comigt_sd(<2 x double> %a0, <2 x double> %a1, i32 %a2, i32 %a3) {
366; SSE-LABEL: test_x86_sse2_comigt_sd:
367; SSE:       # %bb.0:
368; SSE-NEXT:    movl %edi, %eax
369; SSE-NEXT:    comisd %xmm1, %xmm0
370; SSE-NEXT:    cmoval %esi, %eax
371; SSE-NEXT:    retq
372;
373; AVX-LABEL: test_x86_sse2_comigt_sd:
374; AVX:       # %bb.0:
375; AVX-NEXT:    movl %edi, %eax
376; AVX-NEXT:    vcomisd %xmm1, %xmm0
377; AVX-NEXT:    cmoval %esi, %eax
378; AVX-NEXT:    retq
379  %call = call i32 @llvm.x86.sse2.comigt.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
380  %cmp = icmp eq i32 %call, 0
381  %res = select i1 %cmp, i32 %a2, i32 %a3
382  ret i32 %res
383}
384declare i32 @llvm.x86.sse2.comigt.sd(<2 x double>, <2 x double>) nounwind readnone
385
386define i32 @test_x86_sse2_comile_sd(<2 x double> %a0, <2 x double> %a1, i32 %a2, i32 %a3) {
387; SSE-LABEL: test_x86_sse2_comile_sd:
388; SSE:       # %bb.0:
389; SSE-NEXT:    movl %edi, %eax
390; SSE-NEXT:    comisd %xmm0, %xmm1
391; SSE-NEXT:    cmovbl %esi, %eax
392; SSE-NEXT:    retq
393;
394; AVX-LABEL: test_x86_sse2_comile_sd:
395; AVX:       # %bb.0:
396; AVX-NEXT:    movl %edi, %eax
397; AVX-NEXT:    vcomisd %xmm0, %xmm1
398; AVX-NEXT:    cmovbl %esi, %eax
399; AVX-NEXT:    retq
400  %call = call i32 @llvm.x86.sse2.comile.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
401  %cmp = icmp ne i32 %call, 0
402  %res = select i1 %cmp, i32 %a2, i32 %a3
403  ret i32 %res
404}
405declare i32 @llvm.x86.sse2.comile.sd(<2 x double>, <2 x double>) nounwind readnone
406
407define i32 @test_x86_sse2_comilt_sd(<2 x double> %a0, <2 x double> %a1, i32 %a2, i32 %a3) {
408; SSE-LABEL: test_x86_sse2_comilt_sd:
409; SSE:       # %bb.0:
410; SSE-NEXT:    movl %edi, %eax
411; SSE-NEXT:    comisd %xmm0, %xmm1
412; SSE-NEXT:    cmoval %esi, %eax
413; SSE-NEXT:    retq
414;
415; AVX-LABEL: test_x86_sse2_comilt_sd:
416; AVX:       # %bb.0:
417; AVX-NEXT:    movl %edi, %eax
418; AVX-NEXT:    vcomisd %xmm0, %xmm1
419; AVX-NEXT:    cmoval %esi, %eax
420; AVX-NEXT:    retq
421  %call = call i32 @llvm.x86.sse2.comilt.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
422  %cmp = icmp eq i32 %call, 0
423  %res = select i1 %cmp, i32 %a2, i32 %a3
424  ret i32 %res
425}
426declare i32 @llvm.x86.sse2.comilt.sd(<2 x double>, <2 x double>) nounwind readnone
427
428define i32 @test_x86_sse2_comineq_sd(<2 x double> %a0, <2 x double> %a1, i32 %a2, i32 %a3) {
429; SSE-LABEL: test_x86_sse2_comineq_sd:
430; SSE:       # %bb.0:
431; SSE-NEXT:    movl %esi, %eax
432; SSE-NEXT:    comisd %xmm1, %xmm0
433; SSE-NEXT:    cmovnel %edi, %eax
434; SSE-NEXT:    cmovpl %edi, %eax
435; SSE-NEXT:    retq
436;
437; NO-AVX10_2-LABEL: test_x86_sse2_comineq_sd:
438; NO-AVX10_2:       # %bb.0:
439; NO-AVX10_2-NEXT:    movl %esi, %eax
440; NO-AVX10_2-NEXT:    vcomisd %xmm1, %xmm0
441; NO-AVX10_2-NEXT:    cmovnel %edi, %eax
442; NO-AVX10_2-NEXT:    cmovpl %edi, %eax
443; NO-AVX10_2-NEXT:    retq
444;
445; AVX10_2-LABEL: test_x86_sse2_comineq_sd:
446; AVX10_2:       # %bb.0:
447; AVX10_2-NEXT:    movl %edi, %eax
448; AVX10_2-NEXT:    vcomxsd %xmm1, %xmm0
449; AVX10_2-NEXT:    cmovel %esi, %eax
450; AVX10_2-NEXT:    retq
451  %call = call i32 @llvm.x86.sse2.comineq.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
452  %cmp = icmp ne i32 %call, 0
453  %res = select i1 %cmp, i32 %a2, i32 %a3
454  ret i32 %res
455}
456declare i32 @llvm.x86.sse2.comineq.sd(<2 x double>, <2 x double>) nounwind readnone
457
458define i32 @test_x86_sse2_ucomieq_sd(<2 x double> %a0, <2 x double> %a1, i32 %a2, i32 %a3) {
459; SSE-LABEL: test_x86_sse2_ucomieq_sd:
460; SSE:       # %bb.0:
461; SSE-NEXT:    movl %edi, %eax
462; SSE-NEXT:    ucomisd %xmm1, %xmm0
463; SSE-NEXT:    setnp %cl
464; SSE-NEXT:    sete %dl
465; SSE-NEXT:    testb %cl, %dl
466; SSE-NEXT:    cmovnel %esi, %eax
467; SSE-NEXT:    retq
468;
469; NO-AVX10_2-LABEL: test_x86_sse2_ucomieq_sd:
470; NO-AVX10_2:       # %bb.0:
471; NO-AVX10_2-NEXT:    movl %edi, %eax
472; NO-AVX10_2-NEXT:    vucomisd %xmm1, %xmm0
473; NO-AVX10_2-NEXT:    setnp %cl
474; NO-AVX10_2-NEXT:    sete %dl
475; NO-AVX10_2-NEXT:    testb %cl, %dl
476; NO-AVX10_2-NEXT:    cmovnel %esi, %eax
477; NO-AVX10_2-NEXT:    retq
478;
479; AVX10_2-LABEL: test_x86_sse2_ucomieq_sd:
480; AVX10_2:       # %bb.0:
481; AVX10_2-NEXT:    movl %edi, %eax
482; AVX10_2-NEXT:    vucomxsd %xmm1, %xmm0
483; AVX10_2-NEXT:    cmovel %esi, %eax
484; AVX10_2-NEXT:    retq
485  %call = call i32 @llvm.x86.sse2.ucomieq.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
486  %cmp = icmp eq i32 %call, 0
487  %res = select i1 %cmp, i32 %a2, i32 %a3
488  ret i32 %res
489}
490declare i32 @llvm.x86.sse2.ucomieq.sd(<2 x double>, <2 x double>) nounwind readnone
491
492define i32 @test_x86_sse2_ucomige_sd(<2 x double> %a0, <2 x double> %a1, i32 %a2, i32 %a3) {
493; SSE-LABEL: test_x86_sse2_ucomige_sd:
494; SSE:       # %bb.0:
495; SSE-NEXT:    movl %edi, %eax
496; SSE-NEXT:    ucomisd %xmm1, %xmm0
497; SSE-NEXT:    cmovbl %esi, %eax
498; SSE-NEXT:    retq
499;
500; AVX-LABEL: test_x86_sse2_ucomige_sd:
501; AVX:       # %bb.0:
502; AVX-NEXT:    movl %edi, %eax
503; AVX-NEXT:    vucomisd %xmm1, %xmm0
504; AVX-NEXT:    cmovbl %esi, %eax
505; AVX-NEXT:    retq
506  %call = call i32 @llvm.x86.sse2.ucomige.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
507  %cmp = icmp ne i32 %call, 0
508  %res = select i1 %cmp, i32 %a2, i32 %a3
509  ret i32 %res
510}
511declare i32 @llvm.x86.sse2.ucomige.sd(<2 x double>, <2 x double>) nounwind readnone
512
513define i32 @test_x86_sse2_ucomigt_sd(<2 x double> %a0, <2 x double> %a1, i32 %a2, i32 %a3) {
514; SSE-LABEL: test_x86_sse2_ucomigt_sd:
515; SSE:       # %bb.0:
516; SSE-NEXT:    movl %edi, %eax
517; SSE-NEXT:    ucomisd %xmm1, %xmm0
518; SSE-NEXT:    cmoval %esi, %eax
519; SSE-NEXT:    retq
520;
521; AVX-LABEL: test_x86_sse2_ucomigt_sd:
522; AVX:       # %bb.0:
523; AVX-NEXT:    movl %edi, %eax
524; AVX-NEXT:    vucomisd %xmm1, %xmm0
525; AVX-NEXT:    cmoval %esi, %eax
526; AVX-NEXT:    retq
527  %call = call i32 @llvm.x86.sse2.ucomigt.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
528  %cmp = icmp eq i32 %call, 0
529  %res = select i1 %cmp, i32 %a2, i32 %a3
530  ret i32 %res
531}
532declare i32 @llvm.x86.sse2.ucomigt.sd(<2 x double>, <2 x double>) nounwind readnone
533
534define i32 @test_x86_sse2_ucomile_sd(<2 x double> %a0, <2 x double> %a1, i32 %a2, i32 %a3) {
535; SSE-LABEL: test_x86_sse2_ucomile_sd:
536; SSE:       # %bb.0:
537; SSE-NEXT:    movl %edi, %eax
538; SSE-NEXT:    ucomisd %xmm0, %xmm1
539; SSE-NEXT:    cmovbl %esi, %eax
540; SSE-NEXT:    retq
541;
542; AVX-LABEL: test_x86_sse2_ucomile_sd:
543; AVX:       # %bb.0:
544; AVX-NEXT:    movl %edi, %eax
545; AVX-NEXT:    vucomisd %xmm0, %xmm1
546; AVX-NEXT:    cmovbl %esi, %eax
547; AVX-NEXT:    retq
548  %call = call i32 @llvm.x86.sse2.ucomile.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
549  %cmp = icmp ne i32 %call, 0
550  %res = select i1 %cmp, i32 %a2, i32 %a3
551  ret i32 %res
552}
553declare i32 @llvm.x86.sse2.ucomile.sd(<2 x double>, <2 x double>) nounwind readnone
554
555define i32 @test_x86_sse2_ucomilt_sd(<2 x double> %a0, <2 x double> %a1, i32 %a2, i32 %a3) {
556; SSE-LABEL: test_x86_sse2_ucomilt_sd:
557; SSE:       # %bb.0:
558; SSE-NEXT:    movl %edi, %eax
559; SSE-NEXT:    ucomisd %xmm0, %xmm1
560; SSE-NEXT:    cmoval %esi, %eax
561; SSE-NEXT:    retq
562;
563; AVX-LABEL: test_x86_sse2_ucomilt_sd:
564; AVX:       # %bb.0:
565; AVX-NEXT:    movl %edi, %eax
566; AVX-NEXT:    vucomisd %xmm0, %xmm1
567; AVX-NEXT:    cmoval %esi, %eax
568; AVX-NEXT:    retq
569  %call = call i32 @llvm.x86.sse2.ucomilt.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
570  %cmp = icmp eq i32 %call, 0
571  %res = select i1 %cmp, i32 %a2, i32 %a3
572  ret i32 %res
573}
574declare i32 @llvm.x86.sse2.ucomilt.sd(<2 x double>, <2 x double>) nounwind readnone
575
576define i32 @test_x86_sse2_ucomineq_sd(<2 x double> %a0, <2 x double> %a1, i32 %a2, i32 %a3) {
577; SSE-LABEL: test_x86_sse2_ucomineq_sd:
578; SSE:       # %bb.0:
579; SSE-NEXT:    movl %esi, %eax
580; SSE-NEXT:    ucomisd %xmm1, %xmm0
581; SSE-NEXT:    cmovnel %edi, %eax
582; SSE-NEXT:    cmovpl %edi, %eax
583; SSE-NEXT:    retq
584;
585; NO-AVX10_2-LABEL: test_x86_sse2_ucomineq_sd:
586; NO-AVX10_2:       # %bb.0:
587; NO-AVX10_2-NEXT:    movl %esi, %eax
588; NO-AVX10_2-NEXT:    vucomisd %xmm1, %xmm0
589; NO-AVX10_2-NEXT:    cmovnel %edi, %eax
590; NO-AVX10_2-NEXT:    cmovpl %edi, %eax
591; NO-AVX10_2-NEXT:    retq
592;
593; AVX10_2-LABEL: test_x86_sse2_ucomineq_sd:
594; AVX10_2:       # %bb.0:
595; AVX10_2-NEXT:    movl %edi, %eax
596; AVX10_2-NEXT:    vucomxsd %xmm1, %xmm0
597; AVX10_2-NEXT:    cmovel %esi, %eax
598; AVX10_2-NEXT:    retq
599  %call = call i32 @llvm.x86.sse2.ucomineq.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1]
600  %cmp = icmp ne i32 %call, 0
601  %res = select i1 %cmp, i32 %a2, i32 %a3
602  ret i32 %res
603}
604declare i32 @llvm.x86.sse2.ucomineq.sd(<2 x double>, <2 x double>) nounwind readnone
605
606define void @PR38960_eq(<4 x float> %A, <4 x float> %B) {
607; SSE-LABEL: PR38960_eq:
608; SSE:       # %bb.0: # %entry
609; SSE-NEXT:    comiss %xmm1, %xmm0
610; SSE-NEXT:    setnp %al
611; SSE-NEXT:    sete %cl
612; SSE-NEXT:    testb %al, %cl
613; SSE-NEXT:    jne foo@PLT # TAILCALL
614; SSE-NEXT:  # %bb.1: # %if.end
615; SSE-NEXT:    retq
616;
617; NO-AVX10_2-LABEL: PR38960_eq:
618; NO-AVX10_2:       # %bb.0: # %entry
619; NO-AVX10_2-NEXT:    vcomiss %xmm1, %xmm0
620; NO-AVX10_2-NEXT:    setnp %al
621; NO-AVX10_2-NEXT:    sete %cl
622; NO-AVX10_2-NEXT:    testb %al, %cl
623; NO-AVX10_2-NEXT:    jne foo@PLT # TAILCALL
624; NO-AVX10_2-NEXT:  # %bb.1: # %if.end
625; NO-AVX10_2-NEXT:    retq
626;
627; AVX10_2-LABEL: PR38960_eq:
628; AVX10_2:       # %bb.0: # %entry
629; AVX10_2-NEXT:    vcomxss %xmm1, %xmm0
630; AVX10_2-NEXT:    je foo@PLT # TAILCALL
631; AVX10_2-NEXT:  # %bb.1: # %if.end
632; AVX10_2-NEXT:    retq
633entry:
634  %call = tail call i32 @llvm.x86.sse.comieq.ss(<4 x float> %A, <4 x float> %B) #3
635  %cmp = icmp eq i32 %call, 0
636  br i1 %cmp, label %if.end, label %if.then
637
638if.then:
639  tail call void @foo()
640  br label %if.end
641
642if.end:
643  ret void
644}
645
646define void @PR38960_neq(<4 x float> %A, <4 x float> %B) {
647; SSE-LABEL: PR38960_neq:
648; SSE:       # %bb.0: # %entry
649; SSE-NEXT:    comiss %xmm1, %xmm0
650; SSE-NEXT:    setp %al
651; SSE-NEXT:    setne %cl
652; SSE-NEXT:    orb %al, %cl
653; SSE-NEXT:    jne foo@PLT # TAILCALL
654; SSE-NEXT:  # %bb.1: # %if.end
655; SSE-NEXT:    retq
656;
657; NO-AVX10_2-LABEL: PR38960_neq:
658; NO-AVX10_2:       # %bb.0: # %entry
659; NO-AVX10_2-NEXT:    vcomiss %xmm1, %xmm0
660; NO-AVX10_2-NEXT:    setp %al
661; NO-AVX10_2-NEXT:    setne %cl
662; NO-AVX10_2-NEXT:    orb %al, %cl
663; NO-AVX10_2-NEXT:    jne foo@PLT # TAILCALL
664; NO-AVX10_2-NEXT:  # %bb.1: # %if.end
665; NO-AVX10_2-NEXT:    retq
666;
667; AVX10_2-LABEL: PR38960_neq:
668; AVX10_2:       # %bb.0: # %entry
669; AVX10_2-NEXT:    vcomxss %xmm1, %xmm0
670; AVX10_2-NEXT:    jne foo@PLT # TAILCALL
671; AVX10_2-NEXT:  # %bb.1: # %if.end
672; AVX10_2-NEXT:    retq
673entry:
674  %call = tail call i32 @llvm.x86.sse.comineq.ss(<4 x float> %A, <4 x float> %B) #3
675  %cmp = icmp eq i32 %call, 0
676  br i1 %cmp, label %if.end, label %if.then
677
678if.then:
679  tail call void @foo()
680  br label %if.end
681
682if.end:
683  ret void
684}
685declare void @foo()
686