xref: /llvm-project/llvm/test/CodeGen/X86/combine-avx-intrinsics.ll (revision 25528d6de70e98683722e28655d8568d5f09b5c7) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
3
4
5define <4 x double> @test_x86_avx_blend_pd_256(<4 x double> %a0) {
6; CHECK-LABEL: test_x86_avx_blend_pd_256:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    retq
9  %1 = call <4 x double> @llvm.x86.avx.blend.pd.256(<4 x double> %a0, <4 x double> %a0, i32 7)
10  ret <4 x double> %1
11}
12
13define <8 x float> @test_x86_avx_blend_ps_256(<8 x float> %a0) {
14; CHECK-LABEL: test_x86_avx_blend_ps_256:
15; CHECK:       # %bb.0:
16; CHECK-NEXT:    retq
17  %1 = call <8 x float> @llvm.x86.avx.blend.ps.256(<8 x float> %a0, <8 x float> %a0, i32 7)
18  ret <8 x float> %1
19}
20
21define <4 x double> @test2_x86_avx_blend_pd_256(<4 x double> %a0, <4 x double> %a1) {
22; CHECK-LABEL: test2_x86_avx_blend_pd_256:
23; CHECK:       # %bb.0:
24; CHECK-NEXT:    retq
25  %1 = call <4 x double> @llvm.x86.avx.blend.pd.256(<4 x double> %a0, <4 x double> %a1, i32 0)
26  ret <4 x double> %1
27}
28
29define <8 x float> @test2_x86_avx_blend_ps_256(<8 x float> %a0, <8 x float> %a1) {
30; CHECK-LABEL: test2_x86_avx_blend_ps_256:
31; CHECK:       # %bb.0:
32; CHECK-NEXT:    retq
33  %1 = call <8 x float> @llvm.x86.avx.blend.ps.256(<8 x float> %a0, <8 x float> %a1, i32 0)
34  ret <8 x float> %1
35}
36
37define <4 x double> @test3_x86_avx_blend_pd_256(<4 x double> %a0, <4 x double> %a1) {
38; CHECK-LABEL: test3_x86_avx_blend_pd_256:
39; CHECK:       # %bb.0:
40; CHECK-NEXT:    vmovaps %ymm1, %ymm0
41; CHECK-NEXT:    retq
42  %1 = call <4 x double> @llvm.x86.avx.blend.pd.256(<4 x double> %a0, <4 x double> %a1, i32 -1)
43  ret <4 x double> %1
44}
45
46define <8 x float> @test3_x86_avx_blend_ps_256(<8 x float> %a0, <8 x float> %a1) {
47; CHECK-LABEL: test3_x86_avx_blend_ps_256:
48; CHECK:       # %bb.0:
49; CHECK-NEXT:    vmovaps %ymm1, %ymm0
50; CHECK-NEXT:    retq
51  %1 = call <8 x float> @llvm.x86.avx.blend.ps.256(<8 x float> %a0, <8 x float> %a1, i32 -1)
52  ret <8 x float> %1
53}
54
55declare <4 x double> @llvm.x86.avx.blend.pd.256(<4 x double>, <4 x double>, i32)
56declare <8 x float> @llvm.x86.avx.blend.ps.256(<8 x float>, <8 x float>, i32)
57
58