1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s 3 4; Not from issue 76416, but separate testcase reported on the same 5; regressing commit. 6define void @other_regression(i1 %cmp.not.i.i.i) { 7; CHECK-LABEL: other_regression: 8; CHECK: # %bb.0: # %entry 9; CHECK-NEXT: pushq %rax 10; CHECK-NEXT: .cfi_def_cfa_offset 16 11; CHECK-NEXT: movl 0, %eax 12; CHECK-NEXT: xorl %ecx, %ecx 13; CHECK-NEXT: sarl %cl, %eax 14; CHECK-NEXT: movl $1, %edx 15; CHECK-NEXT: xorl %ecx, %ecx 16; CHECK-NEXT: shrl %cl, %edx 17; CHECK-NEXT: imull %eax, %edx 18; CHECK-NEXT: movslq %edx, %rsi 19; CHECK-NEXT: xorl %eax, %eax 20; CHECK-NEXT: xorl %edi, %edi 21; CHECK-NEXT: xorl %edx, %edx 22; CHECK-NEXT: callq *%rax 23entry: 24 br label %for.cond10.preheader 25 26trap: ; preds = %for.body13 27 unreachable 28 29for.cond10.preheader: ; preds = %while.cond.i.i.i, %entry 30 %indvars.iv = phi i64 [ 0, %entry ], [ 1, %while.cond.i.i.i ] 31 %i = trunc i64 %indvars.iv to i32 32 br label %for.body13 33 34for.body13: ; preds = %for.cond10.preheader 35 %i1 = load i32, ptr null, align 4 36 %shr = ashr i32 %i1, %i 37 %shr15 = ashr i32 1, %i 38 %mul16 = mul i32 %shr15, %shr 39 %conv = sext i32 %mul16 to i64 40 call void null(ptr null, i64 %conv, ptr null) 41 br i1 false, label %while.cond.i.i.i, label %trap 42 43while.cond.i.i.i: ; preds = %while.cond.i.i.i, %for.body13 44 br i1 %cmp.not.i.i.i, label %for.cond10.preheader, label %while.cond.i.i.i 45} 46