1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -run-pass=regallocfast -verify-machineinstrs %s -o - | FileCheck %s 3# RUN: llc -passes=regallocfast -verify-machineinstrs %s -o - | FileCheck %s 4--- | 5 ; ModuleID = 'x.c' 6 source_filename = "x.c" 7 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" 8 target triple = "x86_64-unknown-linux-gnu" 9 10 ; Function Attrs: noinline nounwind optnone 11 define dso_local i32 @main() #0 { 12 entry: 13 %retval = alloca i32, align 4 14 %x = alloca i32, align 4 15 store i32 0, ptr %retval, align 4 16 store i32 123, ptr %x, align 4 17 %0 = callbr i32 asm "mov $1, $0\0A\09jmp ${2:l}", "=r,r,!i,~{dirflag},~{fpsr},~{flags}"(i32 45) #2 18 to label %asm.fallthrough [label %label.split], !srcloc !5 19 20 asm.fallthrough: ; preds = %entry 21 store i32 %0, ptr %x, align 4 22 store i32 6, ptr %x, align 4 23 br label %label 24 25 label: ; preds = %asm.fallthrough, %label.split 26 %1 = load i32, ptr %x, align 4 27 ret i32 %1 28 29 label.split: ; preds = %entry 30 %2 = call i32 @llvm.callbr.landingpad.i32(i32 %0) 31 store i32 %2, ptr %x, align 4 32 br label %label 33 } 34 35 ; Function Attrs: nomerge nounwind 36 declare i32 @llvm.callbr.landingpad.i32(i32) #1 37 38 attributes #0 = { noinline nounwind optnone "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } 39 attributes #1 = { nomerge nounwind } 40 attributes #2 = { nounwind memory(none) } 41 42 !llvm.module.flags = !{!0, !1, !2, !3} 43 !llvm.ident = !{!4} 44 45 !0 = !{i32 1, !"wchar_size", i32 4} 46 !1 = !{i32 8, !"PIC Level", i32 2} 47 !2 = !{i32 7, !"PIE Level", i32 2} 48 !3 = !{i32 7, !"frame-pointer", i32 2} 49 !4 = !{!"clang version 17.0.0 (git@github.com:llvm/llvm-project.git cf86855c4453d029a9b9ed8c4c4c18cefc1bc895)"} 50 !5 = !{i64 166, i64 179} 51 52... 53--- 54name: main 55alignment: 16 56exposesReturnsTwice: false 57legalized: false 58regBankSelected: false 59selected: false 60failedISel: false 61tracksRegLiveness: true 62hasWinCFI: false 63callsEHReturn: false 64callsUnwindInit: false 65hasEHCatchret: false 66hasEHScopes: false 67hasEHFunclets: false 68debugInstrRef: false 69failsVerification: false 70tracksDebugUserValues: false 71registers: 72 - { id: 0, class: gr32, preferred-register: '' } 73 - { id: 1, class: gr32, preferred-register: '' } 74 - { id: 2, class: gr32, preferred-register: '' } 75 - { id: 3, class: gr32, preferred-register: '' } 76 - { id: 4, class: gr32, preferred-register: '' } 77 - { id: 5, class: gr32, preferred-register: '' } 78 - { id: 6, class: gr32, preferred-register: '' } 79liveins: [] 80frameInfo: 81 isFrameAddressTaken: false 82 isReturnAddressTaken: false 83 hasStackMap: false 84 hasPatchPoint: false 85 stackSize: 0 86 offsetAdjustment: 0 87 maxAlignment: 4 88 adjustsStack: false 89 hasCalls: false 90 stackProtector: '' 91 functionContext: '' 92 maxCallFrameSize: 4294967295 93 cvBytesOfCalleeSavedRegisters: 0 94 hasOpaqueSPAdjustment: false 95 hasVAStart: false 96 hasMustTailInVarArgFunc: false 97 hasTailCall: false 98 localFrameSize: 0 99 savePoint: '' 100 restorePoint: '' 101fixedStack: [] 102stack: 103 - { id: 0, name: retval, type: default, offset: 0, size: 4, alignment: 4, 104 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 105 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 106 - { id: 1, name: x, type: default, offset: 0, size: 4, alignment: 4, 107 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 108 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 109callSites: [] 110debugValueSubstitutions: [] 111constants: [] 112machineFunctionInfo: {} 113body: | 114 ; CHECK-LABEL: name: main 115 ; CHECK: bb.0.entry: 116 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.3(0x40000000) 117 ; CHECK-NEXT: {{ $}} 118 ; CHECK-NEXT: MOV32mi %stack.0.retval, 1, $noreg, 0, $noreg, 0 :: (store (s32) into %ir.retval) 119 ; CHECK-NEXT: MOV32mi %stack.1.x, 1, $noreg, 0, $noreg, 123 :: (store (s32) into %ir.x) 120 ; CHECK-NEXT: renamable $eax = MOV32ri 45 121 ; CHECK-NEXT: INLINEASM_BR &"mov $1, $0\0A\09jmp ${2:l}", 0 /* attdialect */, 2359306 /* regdef:GR32 */, def renamable $eax, 2359305 /* reguse:GR32 */, killed renamable $eax, 13 /* imm */, %bb.3, 12 /* clobber */, implicit-def dead early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def dead early-clobber $eflags, !5 122 ; CHECK-NEXT: MOV32mr %stack.3, 1, $noreg, 0, $noreg, $eax :: (store (s32) into %stack.3) 123 ; CHECK-NEXT: MOV32mr %stack.2, 1, $noreg, 0, $noreg, killed $eax :: (store (s32) into %stack.2) 124 ; CHECK-NEXT: JMP_1 %bb.1 125 ; CHECK-NEXT: {{ $}} 126 ; CHECK-NEXT: bb.1.asm.fallthrough: 127 ; CHECK-NEXT: successors: %bb.2(0x80000000) 128 ; CHECK-NEXT: {{ $}} 129 ; CHECK-NEXT: $eax = MOV32rm %stack.2, 1, $noreg, 0, $noreg :: (load (s32) from %stack.2) 130 ; CHECK-NEXT: MOV32mr %stack.1.x, 1, $noreg, 0, $noreg, renamable $eax :: (store (s32) into %ir.x) 131 ; CHECK-NEXT: MOV32mi %stack.1.x, 1, $noreg, 0, $noreg, 6 :: (store (s32) into %ir.x) 132 ; CHECK-NEXT: {{ $}} 133 ; CHECK-NEXT: bb.2.label: 134 ; CHECK-NEXT: renamable $eax = MOV32rm %stack.1.x, 1, $noreg, 0, $noreg :: (load (s32) from %ir.x) 135 ; CHECK-NEXT: RET64 implicit killed $eax 136 ; CHECK-NEXT: {{ $}} 137 ; CHECK-NEXT: bb.3.label.split (machine-block-address-taken, inlineasm-br-indirect-target): 138 ; CHECK-NEXT: successors: %bb.2(0x80000000) 139 ; CHECK-NEXT: liveins: $eax 140 ; CHECK-NEXT: {{ $}} 141 ; CHECK-NEXT: MOV32mr %stack.3, 1, $noreg, 0, $noreg, $eax :: (store (s32) into %stack.3) 142 ; CHECK-NEXT: $eax = MOV32rm %stack.3, 1, $noreg, 0, $noreg :: (load (s32) from %stack.3) 143 ; CHECK-NEXT: MOV32mr %stack.1.x, 1, $noreg, 0, $noreg, killed renamable $eax :: (store (s32) into %ir.x) 144 ; CHECK-NEXT: JMP_1 %bb.2 145 bb.0.entry: 146 successors: %bb.1(0x40000000), %bb.3(0x40000000) 147 148 MOV32mi %stack.0.retval, 1, $noreg, 0, $noreg, 0 :: (store (s32) into %ir.retval) 149 MOV32mi %stack.1.x, 1, $noreg, 0, $noreg, 123 :: (store (s32) into %ir.x) 150 %2:gr32 = MOV32ri 45 151 INLINEASM_BR &"mov $1, $0\0A\09jmp ${2:l}", 0 /* attdialect */, 2359306 /* regdef:GR32 */, def %1, 2359305 /* reguse:GR32 */, %2, 13 /* imm */, %bb.3, 12 /* clobber */, implicit-def early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def early-clobber $eflags, !5 152 %0:gr32 = COPY %1 153 JMP_1 %bb.1 154 155 bb.1.asm.fallthrough: 156 successors: %bb.2(0x80000000) 157 158 MOV32mr %stack.1.x, 1, $noreg, 0, $noreg, %0 :: (store (s32) into %ir.x) 159 MOV32mi %stack.1.x, 1, $noreg, 0, $noreg, 6 :: (store (s32) into %ir.x) 160 161 bb.2.label: 162 %6:gr32 = MOV32rm %stack.1.x, 1, $noreg, 0, $noreg :: (load (s32) from %ir.x) 163 $eax = COPY %6 164 RET64 implicit $eax 165 166 bb.3.label.split (machine-block-address-taken, inlineasm-br-indirect-target): 167 successors: %bb.2(0x80000000) 168 169 %3:gr32 = COPY %1 170 MOV32mr %stack.1.x, 1, $noreg, 0, $noreg, %3 :: (store (s32) into %ir.x) 171 JMP_1 %bb.2 172 173... 174