xref: /llvm-project/llvm/test/CodeGen/X86/buildvec-extract.ll (revision 69a322fed19b977d15be9500d8653496b73673e9)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2   | FileCheck %s --check-prefixes=SSE,SSE2
3; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
4; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx    | FileCheck %s --check-prefix=AVX
5
6define <2 x i64> @extract0_i32_zext_insert0_i64_undef(<4 x i32> %x) {
7; SSE2-LABEL: extract0_i32_zext_insert0_i64_undef:
8; SSE2:       # %bb.0:
9; SSE2-NEXT:    xorps %xmm1, %xmm1
10; SSE2-NEXT:    unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
11; SSE2-NEXT:    retq
12;
13; SSE41-LABEL: extract0_i32_zext_insert0_i64_undef:
14; SSE41:       # %bb.0:
15; SSE41-NEXT:    pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
16; SSE41-NEXT:    retq
17;
18; AVX-LABEL: extract0_i32_zext_insert0_i64_undef:
19; AVX:       # %bb.0:
20; AVX-NEXT:    vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
21; AVX-NEXT:    retq
22  %e = extractelement <4 x i32> %x, i32 0
23  %z = zext i32 %e to i64
24  %r = insertelement <2 x i64> undef, i64 %z, i32 0
25  ret <2 x i64> %r
26}
27
28define <2 x i64> @extract0_i32_zext_insert0_i64_zero(<4 x i32> %x) {
29; SSE2-LABEL: extract0_i32_zext_insert0_i64_zero:
30; SSE2:       # %bb.0:
31; SSE2-NEXT:    xorps %xmm1, %xmm1
32; SSE2-NEXT:    movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
33; SSE2-NEXT:    movaps %xmm1, %xmm0
34; SSE2-NEXT:    retq
35;
36; SSE41-LABEL: extract0_i32_zext_insert0_i64_zero:
37; SSE41:       # %bb.0:
38; SSE41-NEXT:    xorps %xmm1, %xmm1
39; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
40; SSE41-NEXT:    retq
41;
42; AVX-LABEL: extract0_i32_zext_insert0_i64_zero:
43; AVX:       # %bb.0:
44; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
45; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
46; AVX-NEXT:    retq
47  %e = extractelement <4 x i32> %x, i32 0
48  %z = zext i32 %e to i64
49  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
50  ret <2 x i64> %r
51}
52
53define <2 x i64> @extract1_i32_zext_insert0_i64_undef(<4 x i32> %x) {
54; SSE-LABEL: extract1_i32_zext_insert0_i64_undef:
55; SSE:       # %bb.0:
56; SSE-NEXT:    psrlq $32, %xmm0
57; SSE-NEXT:    retq
58;
59; AVX-LABEL: extract1_i32_zext_insert0_i64_undef:
60; AVX:       # %bb.0:
61; AVX-NEXT:    vpsrlq $32, %xmm0, %xmm0
62; AVX-NEXT:    retq
63  %e = extractelement <4 x i32> %x, i32 1
64  %z = zext i32 %e to i64
65  %r = insertelement <2 x i64> undef, i64 %z, i32 0
66  ret <2 x i64> %r
67}
68
69define <2 x i64> @extract1_i32_zext_insert0_i64_zero(<4 x i32> %x) {
70; SSE2-LABEL: extract1_i32_zext_insert0_i64_zero:
71; SSE2:       # %bb.0:
72; SSE2-NEXT:    xorps %xmm1, %xmm1
73; SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[1,0],xmm1[1,0]
74; SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[2,3]
75; SSE2-NEXT:    retq
76;
77; SSE41-LABEL: extract1_i32_zext_insert0_i64_zero:
78; SSE41:       # %bb.0:
79; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
80; SSE41-NEXT:    pxor %xmm0, %xmm0
81; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5,6,7]
82; SSE41-NEXT:    retq
83;
84; AVX-LABEL: extract1_i32_zext_insert0_i64_zero:
85; AVX:       # %bb.0:
86; AVX-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[1,1,1,1]
87; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
88; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
89; AVX-NEXT:    retq
90  %e = extractelement <4 x i32> %x, i32 1
91  %z = zext i32 %e to i64
92  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
93  ret <2 x i64> %r
94}
95
96define <2 x i64> @extract2_i32_zext_insert0_i64_undef(<4 x i32> %x) {
97; SSE-LABEL: extract2_i32_zext_insert0_i64_undef:
98; SSE:       # %bb.0:
99; SSE-NEXT:    xorps %xmm1, %xmm1
100; SSE-NEXT:    unpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
101; SSE-NEXT:    retq
102;
103; AVX-LABEL: extract2_i32_zext_insert0_i64_undef:
104; AVX:       # %bb.0:
105; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
106; AVX-NEXT:    vunpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
107; AVX-NEXT:    retq
108  %e = extractelement <4 x i32> %x, i32 2
109  %z = zext i32 %e to i64
110  %r = insertelement <2 x i64> undef, i64 %z, i32 0
111  ret <2 x i64> %r
112}
113
114define <2 x i64> @extract2_i32_zext_insert0_i64_zero(<4 x i32> %x) {
115; SSE2-LABEL: extract2_i32_zext_insert0_i64_zero:
116; SSE2:       # %bb.0:
117; SSE2-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
118; SSE2-NEXT:    xorps %xmm1, %xmm1
119; SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[2,3]
120; SSE2-NEXT:    retq
121;
122; SSE41-LABEL: extract2_i32_zext_insert0_i64_zero:
123; SSE41:       # %bb.0:
124; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
125; SSE41-NEXT:    pxor %xmm0, %xmm0
126; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5,6,7]
127; SSE41-NEXT:    retq
128;
129; AVX-LABEL: extract2_i32_zext_insert0_i64_zero:
130; AVX:       # %bb.0:
131; AVX-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[2,3,2,3]
132; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
133; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
134; AVX-NEXT:    retq
135  %e = extractelement <4 x i32> %x, i32 2
136  %z = zext i32 %e to i64
137  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
138  ret <2 x i64> %r
139}
140
141define <2 x i64> @extract3_i32_zext_insert0_i64_undef(<4 x i32> %x) {
142; SSE-LABEL: extract3_i32_zext_insert0_i64_undef:
143; SSE:       # %bb.0:
144; SSE-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
145; SSE-NEXT:    retq
146;
147; AVX-LABEL: extract3_i32_zext_insert0_i64_undef:
148; AVX:       # %bb.0:
149; AVX-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
150; AVX-NEXT:    retq
151  %e = extractelement <4 x i32> %x, i32 3
152  %z = zext i32 %e to i64
153  %r = insertelement <2 x i64> undef, i64 %z, i32 0
154  ret <2 x i64> %r
155}
156
157define <2 x i64> @extract3_i32_zext_insert0_i64_zero(<4 x i32> %x) {
158; SSE-LABEL: extract3_i32_zext_insert0_i64_zero:
159; SSE:       # %bb.0:
160; SSE-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
161; SSE-NEXT:    retq
162;
163; AVX-LABEL: extract3_i32_zext_insert0_i64_zero:
164; AVX:       # %bb.0:
165; AVX-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
166; AVX-NEXT:    retq
167  %e = extractelement <4 x i32> %x, i32 3
168  %z = zext i32 %e to i64
169  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
170  ret <2 x i64> %r
171}
172
173define <2 x i64> @extract0_i32_zext_insert1_i64_undef(<4 x i32> %x) {
174; SSE2-LABEL: extract0_i32_zext_insert1_i64_undef:
175; SSE2:       # %bb.0:
176; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
177; SSE2-NEXT:    pxor %xmm1, %xmm1
178; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
179; SSE2-NEXT:    retq
180;
181; SSE41-LABEL: extract0_i32_zext_insert1_i64_undef:
182; SSE41:       # %bb.0:
183; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[0,1,0,1]
184; SSE41-NEXT:    pxor %xmm0, %xmm0
185; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5],xmm0[6,7]
186; SSE41-NEXT:    retq
187;
188; AVX-LABEL: extract0_i32_zext_insert1_i64_undef:
189; AVX:       # %bb.0:
190; AVX-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,1,0,1]
191; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
192; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
193; AVX-NEXT:    retq
194  %e = extractelement <4 x i32> %x, i32 0
195  %z = zext i32 %e to i64
196  %r = insertelement <2 x i64> undef, i64 %z, i32 1
197  ret <2 x i64> %r
198}
199
200define <2 x i64> @extract0_i32_zext_insert1_i64_zero(<4 x i32> %x) {
201; SSE2-LABEL: extract0_i32_zext_insert1_i64_zero:
202; SSE2:       # %bb.0:
203; SSE2-NEXT:    xorps %xmm1, %xmm1
204; SSE2-NEXT:    movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
205; SSE2-NEXT:    pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7]
206; SSE2-NEXT:    movdqa %xmm1, %xmm0
207; SSE2-NEXT:    retq
208;
209; SSE41-LABEL: extract0_i32_zext_insert1_i64_zero:
210; SSE41:       # %bb.0:
211; SSE41-NEXT:    pxor %xmm1, %xmm1
212; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
213; SSE41-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
214; SSE41-NEXT:    retq
215;
216; AVX-LABEL: extract0_i32_zext_insert1_i64_zero:
217; AVX:       # %bb.0:
218; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
219; AVX-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
220; AVX-NEXT:    vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
221; AVX-NEXT:    retq
222  %e = extractelement <4 x i32> %x, i32 0
223  %z = zext i32 %e to i64
224  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
225  ret <2 x i64> %r
226}
227
228define <2 x i64> @extract1_i32_zext_insert1_i64_undef(<4 x i32> %x) {
229; SSE2-LABEL: extract1_i32_zext_insert1_i64_undef:
230; SSE2:       # %bb.0:
231; SSE2-NEXT:    xorps %xmm1, %xmm1
232; SSE2-NEXT:    unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
233; SSE2-NEXT:    retq
234;
235; SSE41-LABEL: extract1_i32_zext_insert1_i64_undef:
236; SSE41:       # %bb.0:
237; SSE41-NEXT:    pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
238; SSE41-NEXT:    retq
239;
240; AVX-LABEL: extract1_i32_zext_insert1_i64_undef:
241; AVX:       # %bb.0:
242; AVX-NEXT:    vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
243; AVX-NEXT:    retq
244  %e = extractelement <4 x i32> %x, i32 1
245  %z = zext i32 %e to i64
246  %r = insertelement <2 x i64> undef, i64 %z, i32 1
247  ret <2 x i64> %r
248}
249
250define <2 x i64> @extract1_i32_zext_insert1_i64_zero(<4 x i32> %x) {
251; SSE2-LABEL: extract1_i32_zext_insert1_i64_zero:
252; SSE2:       # %bb.0:
253; SSE2-NEXT:    psrlq $32, %xmm0
254; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
255; SSE2-NEXT:    retq
256;
257; SSE41-LABEL: extract1_i32_zext_insert1_i64_zero:
258; SSE41:       # %bb.0:
259; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[4,5,6,7],zero,zero,zero,zero
260; SSE41-NEXT:    retq
261;
262; AVX-LABEL: extract1_i32_zext_insert1_i64_zero:
263; AVX:       # %bb.0:
264; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[4,5,6,7],zero,zero,zero,zero
265; AVX-NEXT:    retq
266  %e = extractelement <4 x i32> %x, i32 1
267  %z = zext i32 %e to i64
268  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
269  ret <2 x i64> %r
270}
271
272define <2 x i64> @extract2_i32_zext_insert1_i64_undef(<4 x i32> %x) {
273; SSE2-LABEL: extract2_i32_zext_insert1_i64_undef:
274; SSE2:       # %bb.0:
275; SSE2-NEXT:    andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
276; SSE2-NEXT:    retq
277;
278; SSE41-LABEL: extract2_i32_zext_insert1_i64_undef:
279; SSE41:       # %bb.0:
280; SSE41-NEXT:    xorps %xmm1, %xmm1
281; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
282; SSE41-NEXT:    retq
283;
284; AVX-LABEL: extract2_i32_zext_insert1_i64_undef:
285; AVX:       # %bb.0:
286; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
287; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
288; AVX-NEXT:    retq
289  %e = extractelement <4 x i32> %x, i32 2
290  %z = zext i32 %e to i64
291  %r = insertelement <2 x i64> undef, i64 %z, i32 1
292  ret <2 x i64> %r
293}
294
295define <2 x i64> @extract2_i32_zext_insert1_i64_zero(<4 x i32> %x) {
296; SSE2-LABEL: extract2_i32_zext_insert1_i64_zero:
297; SSE2:       # %bb.0:
298; SSE2-NEXT:    andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
299; SSE2-NEXT:    retq
300;
301; SSE41-LABEL: extract2_i32_zext_insert1_i64_zero:
302; SSE41:       # %bb.0:
303; SSE41-NEXT:    xorps %xmm1, %xmm1
304; SSE41-NEXT:    blendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2],xmm1[3]
305; SSE41-NEXT:    retq
306;
307; AVX-LABEL: extract2_i32_zext_insert1_i64_zero:
308; AVX:       # %bb.0:
309; AVX-NEXT:    vxorps %xmm1, %xmm1, %xmm1
310; AVX-NEXT:    vblendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2],xmm1[3]
311; AVX-NEXT:    retq
312  %e = extractelement <4 x i32> %x, i32 2
313  %z = zext i32 %e to i64
314  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
315  ret <2 x i64> %r
316}
317
318define <2 x i64> @extract3_i32_zext_insert1_i64_undef(<4 x i32> %x) {
319; SSE-LABEL: extract3_i32_zext_insert1_i64_undef:
320; SSE:       # %bb.0:
321; SSE-NEXT:    psrlq $32, %xmm0
322; SSE-NEXT:    retq
323;
324; AVX-LABEL: extract3_i32_zext_insert1_i64_undef:
325; AVX:       # %bb.0:
326; AVX-NEXT:    vpsrlq $32, %xmm0, %xmm0
327; AVX-NEXT:    retq
328  %e = extractelement <4 x i32> %x, i32 3
329  %z = zext i32 %e to i64
330  %r = insertelement <2 x i64> undef, i64 %z, i32 1
331  ret <2 x i64> %r
332}
333
334define <2 x i64> @extract3_i32_zext_insert1_i64_zero(<4 x i32> %x) {
335; SSE-LABEL: extract3_i32_zext_insert1_i64_zero:
336; SSE:       # %bb.0:
337; SSE-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
338; SSE-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
339; SSE-NEXT:    retq
340;
341; AVX-LABEL: extract3_i32_zext_insert1_i64_zero:
342; AVX:       # %bb.0:
343; AVX-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
344; AVX-NEXT:    vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
345; AVX-NEXT:    retq
346  %e = extractelement <4 x i32> %x, i32 3
347  %z = zext i32 %e to i64
348  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
349  ret <2 x i64> %r
350}
351
352define <2 x i64> @extract0_i16_zext_insert0_i64_undef(<8 x i16> %x) {
353; SSE2-LABEL: extract0_i16_zext_insert0_i64_undef:
354; SSE2:       # %bb.0:
355; SSE2-NEXT:    pxor %xmm1, %xmm1
356; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
357; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
358; SSE2-NEXT:    retq
359;
360; SSE41-LABEL: extract0_i16_zext_insert0_i64_undef:
361; SSE41:       # %bb.0:
362; SSE41-NEXT:    pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
363; SSE41-NEXT:    retq
364;
365; AVX-LABEL: extract0_i16_zext_insert0_i64_undef:
366; AVX:       # %bb.0:
367; AVX-NEXT:    vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
368; AVX-NEXT:    retq
369  %e = extractelement <8 x i16> %x, i32 0
370  %z = zext i16 %e to i64
371  %r = insertelement <2 x i64> undef, i64 %z, i32 0
372  ret <2 x i64> %r
373}
374
375define <2 x i64> @extract0_i16_zext_insert0_i64_zero(<8 x i16> %x) {
376; SSE2-LABEL: extract0_i16_zext_insert0_i64_zero:
377; SSE2:       # %bb.0:
378; SSE2-NEXT:    andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
379; SSE2-NEXT:    retq
380;
381; SSE41-LABEL: extract0_i16_zext_insert0_i64_zero:
382; SSE41:       # %bb.0:
383; SSE41-NEXT:    pxor %xmm1, %xmm1
384; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7]
385; SSE41-NEXT:    retq
386;
387; AVX-LABEL: extract0_i16_zext_insert0_i64_zero:
388; AVX:       # %bb.0:
389; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
390; AVX-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7]
391; AVX-NEXT:    retq
392  %e = extractelement <8 x i16> %x, i32 0
393  %z = zext i16 %e to i64
394  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
395  ret <2 x i64> %r
396}
397
398define <2 x i64> @extract1_i16_zext_insert0_i64_undef(<8 x i16> %x) {
399; SSE-LABEL: extract1_i16_zext_insert0_i64_undef:
400; SSE:       # %bb.0:
401; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
402; SSE-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
403; SSE-NEXT:    retq
404;
405; AVX-LABEL: extract1_i16_zext_insert0_i64_undef:
406; AVX:       # %bb.0:
407; AVX-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
408; AVX-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
409; AVX-NEXT:    retq
410  %e = extractelement <8 x i16> %x, i32 1
411  %z = zext i16 %e to i64
412  %r = insertelement <2 x i64> undef, i64 %z, i32 0
413  ret <2 x i64> %r
414}
415
416define <2 x i64> @extract1_i16_zext_insert0_i64_zero(<8 x i16> %x) {
417; SSE-LABEL: extract1_i16_zext_insert0_i64_zero:
418; SSE:       # %bb.0:
419; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
420; SSE-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
421; SSE-NEXT:    retq
422;
423; AVX-LABEL: extract1_i16_zext_insert0_i64_zero:
424; AVX:       # %bb.0:
425; AVX-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
426; AVX-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
427; AVX-NEXT:    retq
428  %e = extractelement <8 x i16> %x, i32 1
429  %z = zext i16 %e to i64
430  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
431  ret <2 x i64> %r
432}
433
434define <2 x i64> @extract2_i16_zext_insert0_i64_undef(<8 x i16> %x) {
435; SSE-LABEL: extract2_i16_zext_insert0_i64_undef:
436; SSE:       # %bb.0:
437; SSE-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
438; SSE-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
439; SSE-NEXT:    retq
440;
441; AVX-LABEL: extract2_i16_zext_insert0_i64_undef:
442; AVX:       # %bb.0:
443; AVX-NEXT:    vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
444; AVX-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
445; AVX-NEXT:    retq
446  %e = extractelement <8 x i16> %x, i32 2
447  %z = zext i16 %e to i64
448  %r = insertelement <2 x i64> undef, i64 %z, i32 0
449  ret <2 x i64> %r
450}
451
452define <2 x i64> @extract2_i16_zext_insert0_i64_zero(<8 x i16> %x) {
453; SSE-LABEL: extract2_i16_zext_insert0_i64_zero:
454; SSE:       # %bb.0:
455; SSE-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
456; SSE-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
457; SSE-NEXT:    retq
458;
459; AVX-LABEL: extract2_i16_zext_insert0_i64_zero:
460; AVX:       # %bb.0:
461; AVX-NEXT:    vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
462; AVX-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
463; AVX-NEXT:    retq
464  %e = extractelement <8 x i16> %x, i32 2
465  %z = zext i16 %e to i64
466  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
467  ret <2 x i64> %r
468}
469
470define <2 x i64> @extract3_i16_zext_insert0_i64_undef(<8 x i16> %x) {
471; SSE-LABEL: extract3_i16_zext_insert0_i64_undef:
472; SSE:       # %bb.0:
473; SSE-NEXT:    psrlq $48, %xmm0
474; SSE-NEXT:    retq
475;
476; AVX-LABEL: extract3_i16_zext_insert0_i64_undef:
477; AVX:       # %bb.0:
478; AVX-NEXT:    vpsrlq $48, %xmm0, %xmm0
479; AVX-NEXT:    retq
480  %e = extractelement <8 x i16> %x, i32 3
481  %z = zext i16 %e to i64
482  %r = insertelement <2 x i64> undef, i64 %z, i32 0
483  ret <2 x i64> %r
484}
485
486define <2 x i64> @extract3_i16_zext_insert0_i64_zero(<8 x i16> %x) {
487; SSE-LABEL: extract3_i16_zext_insert0_i64_zero:
488; SSE:       # %bb.0:
489; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
490; SSE-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
491; SSE-NEXT:    retq
492;
493; AVX-LABEL: extract3_i16_zext_insert0_i64_zero:
494; AVX:       # %bb.0:
495; AVX-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
496; AVX-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
497; AVX-NEXT:    retq
498  %e = extractelement <8 x i16> %x, i32 3
499  %z = zext i16 %e to i64
500  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 0
501  ret <2 x i64> %r
502}
503
504define <2 x i64> @extract0_i16_zext_insert1_i64_undef(<8 x i16> %x) {
505; SSE2-LABEL: extract0_i16_zext_insert1_i64_undef:
506; SSE2:       # %bb.0:
507; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1]
508; SSE2-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
509; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
510; SSE2-NEXT:    retq
511;
512; SSE41-LABEL: extract0_i16_zext_insert1_i64_undef:
513; SSE41:       # %bb.0:
514; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[0,1,0,1]
515; SSE41-NEXT:    pxor %xmm0, %xmm0
516; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4],xmm0[5,6,7]
517; SSE41-NEXT:    retq
518;
519; AVX-LABEL: extract0_i16_zext_insert1_i64_undef:
520; AVX:       # %bb.0:
521; AVX-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
522; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
523; AVX-NEXT:    vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]
524; AVX-NEXT:    retq
525  %e = extractelement <8 x i16> %x, i32 0
526  %z = zext i16 %e to i64
527  %r = insertelement <2 x i64> undef, i64 %z, i32 1
528  ret <2 x i64> %r
529}
530
531define <2 x i64> @extract0_i16_zext_insert1_i64_zero(<8 x i16> %x) {
532; SSE2-LABEL: extract0_i16_zext_insert1_i64_zero:
533; SSE2:       # %bb.0:
534; SSE2-NEXT:    pextrw $0, %xmm0, %eax
535; SSE2-NEXT:    movd %eax, %xmm0
536; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
537; SSE2-NEXT:    retq
538;
539; SSE41-LABEL: extract0_i16_zext_insert1_i64_zero:
540; SSE41:       # %bb.0:
541; SSE41-NEXT:    pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
542; SSE41-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
543; SSE41-NEXT:    retq
544;
545; AVX-LABEL: extract0_i16_zext_insert1_i64_zero:
546; AVX:       # %bb.0:
547; AVX-NEXT:    vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
548; AVX-NEXT:    vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
549; AVX-NEXT:    retq
550  %e = extractelement <8 x i16> %x, i32 0
551  %z = zext i16 %e to i64
552  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
553  ret <2 x i64> %r
554}
555
556define <2 x i64> @extract1_i16_zext_insert1_i64_undef(<8 x i16> %x) {
557; SSE2-LABEL: extract1_i16_zext_insert1_i64_undef:
558; SSE2:       # %bb.0:
559; SSE2-NEXT:    pxor %xmm1, %xmm1
560; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
561; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
562; SSE2-NEXT:    retq
563;
564; SSE41-LABEL: extract1_i16_zext_insert1_i64_undef:
565; SSE41:       # %bb.0:
566; SSE41-NEXT:    pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
567; SSE41-NEXT:    retq
568;
569; AVX-LABEL: extract1_i16_zext_insert1_i64_undef:
570; AVX:       # %bb.0:
571; AVX-NEXT:    vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
572; AVX-NEXT:    retq
573  %e = extractelement <8 x i16> %x, i32 1
574  %z = zext i16 %e to i64
575  %r = insertelement <2 x i64> undef, i64 %z, i32 1
576  ret <2 x i64> %r
577}
578
579define <2 x i64> @extract1_i16_zext_insert1_i64_zero(<8 x i16> %x) {
580; SSE2-LABEL: extract1_i16_zext_insert1_i64_zero:
581; SSE2:       # %bb.0:
582; SSE2-NEXT:    pextrw $1, %xmm0, %eax
583; SSE2-NEXT:    movd %eax, %xmm0
584; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
585; SSE2-NEXT:    retq
586;
587; SSE41-LABEL: extract1_i16_zext_insert1_i64_zero:
588; SSE41:       # %bb.0:
589; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[2,3],zero,zero,zero,zero,zero,zero
590; SSE41-NEXT:    retq
591;
592; AVX-LABEL: extract1_i16_zext_insert1_i64_zero:
593; AVX:       # %bb.0:
594; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[2,3],zero,zero,zero,zero,zero,zero
595; AVX-NEXT:    retq
596  %e = extractelement <8 x i16> %x, i32 1
597  %z = zext i16 %e to i64
598  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
599  ret <2 x i64> %r
600}
601
602define <2 x i64> @extract2_i16_zext_insert1_i64_undef(<8 x i16> %x) {
603; SSE2-LABEL: extract2_i16_zext_insert1_i64_undef:
604; SSE2:       # %bb.0:
605; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
606; SSE2-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
607; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
608; SSE2-NEXT:    retq
609;
610; SSE41-LABEL: extract2_i16_zext_insert1_i64_undef:
611; SSE41:       # %bb.0:
612; SSE41-NEXT:    pmovzxdq {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero
613; SSE41-NEXT:    pxor %xmm0, %xmm0
614; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4],xmm0[5,6,7]
615; SSE41-NEXT:    retq
616;
617; AVX-LABEL: extract2_i16_zext_insert1_i64_undef:
618; AVX:       # %bb.0:
619; AVX-NEXT:    vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
620; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
621; AVX-NEXT:    vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]
622; AVX-NEXT:    retq
623  %e = extractelement <8 x i16> %x, i32 2
624  %z = zext i16 %e to i64
625  %r = insertelement <2 x i64> undef, i64 %z, i32 1
626  ret <2 x i64> %r
627}
628
629define <2 x i64> @extract2_i16_zext_insert1_i64_zero(<8 x i16> %x) {
630; SSE2-LABEL: extract2_i16_zext_insert1_i64_zero:
631; SSE2:       # %bb.0:
632; SSE2-NEXT:    pextrw $2, %xmm0, %eax
633; SSE2-NEXT:    movd %eax, %xmm0
634; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
635; SSE2-NEXT:    retq
636;
637; SSE41-LABEL: extract2_i16_zext_insert1_i64_zero:
638; SSE41:       # %bb.0:
639; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[4,5],zero,zero,zero,zero,zero,zero
640; SSE41-NEXT:    retq
641;
642; AVX-LABEL: extract2_i16_zext_insert1_i64_zero:
643; AVX:       # %bb.0:
644; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[4,5],zero,zero,zero,zero,zero,zero
645; AVX-NEXT:    retq
646  %e = extractelement <8 x i16> %x, i32 2
647  %z = zext i16 %e to i64
648  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
649  ret <2 x i64> %r
650}
651
652define <2 x i64> @extract3_i16_zext_insert1_i64_undef(<8 x i16> %x) {
653; SSE2-LABEL: extract3_i16_zext_insert1_i64_undef:
654; SSE2:       # %bb.0:
655; SSE2-NEXT:    psrlq $48, %xmm0
656; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
657; SSE2-NEXT:    retq
658;
659; SSE41-LABEL: extract3_i16_zext_insert1_i64_undef:
660; SSE41:       # %bb.0:
661; SSE41-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13]
662; SSE41-NEXT:    pxor %xmm1, %xmm1
663; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]
664; SSE41-NEXT:    retq
665;
666; AVX-LABEL: extract3_i16_zext_insert1_i64_undef:
667; AVX:       # %bb.0:
668; AVX-NEXT:    vpslldq {{.*#+}} xmm0 = zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13]
669; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
670; AVX-NEXT:    vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4],xmm1[5,6,7]
671; AVX-NEXT:    retq
672  %e = extractelement <8 x i16> %x, i32 3
673  %z = zext i16 %e to i64
674  %r = insertelement <2 x i64> undef, i64 %z, i32 1
675  ret <2 x i64> %r
676}
677
678define <2 x i64> @extract3_i16_zext_insert1_i64_zero(<8 x i16> %x) {
679; SSE2-LABEL: extract3_i16_zext_insert1_i64_zero:
680; SSE2:       # %bb.0:
681; SSE2-NEXT:    psrlq $48, %xmm0
682; SSE2-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
683; SSE2-NEXT:    retq
684;
685; SSE41-LABEL: extract3_i16_zext_insert1_i64_zero:
686; SSE41:       # %bb.0:
687; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[6,7],zero,zero,zero,zero,zero,zero
688; SSE41-NEXT:    retq
689;
690; AVX-LABEL: extract3_i16_zext_insert1_i64_zero:
691; AVX:       # %bb.0:
692; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[6,7],zero,zero,zero,zero,zero,zero
693; AVX-NEXT:    retq
694  %e = extractelement <8 x i16> %x, i32 3
695  %z = zext i16 %e to i64
696  %r = insertelement <2 x i64> zeroinitializer, i64 %z, i32 1
697  ret <2 x i64> %r
698}
699
700