xref: /llvm-project/llvm/test/CodeGen/X86/bswap_tree2.ll (revision ac1b999e855ed9ab5908842be6c1e4cbd246d3bc)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK64
4
5; Check a few invalid patterns for halfword bswap pattern matching
6
7; Don't match a near-miss 32-bit packed halfword bswap
8; (with only half of the swap tree valid).
9  define i32 @test1(i32 %x) nounwind {
10; CHECK-LABEL: test1:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
13; CHECK-NEXT:    movl %eax, %ecx
14; CHECK-NEXT:    andl $16711935, %ecx # imm = 0xFF00FF
15; CHECK-NEXT:    shll $8, %ecx
16; CHECK-NEXT:    orl $-16777216, %eax # imm = 0xFF000000
17; CHECK-NEXT:    shrl $8, %eax
18; CHECK-NEXT:    orl %ecx, %eax
19; CHECK-NEXT:    retl
20;
21; CHECK64-LABEL: test1:
22; CHECK64:       # %bb.0:
23; CHECK64-NEXT:    movl %edi, %eax
24; CHECK64-NEXT:    andl $16711935, %eax # imm = 0xFF00FF
25; CHECK64-NEXT:    shll $8, %eax
26; CHECK64-NEXT:    orl $-16777216, %edi # imm = 0xFF000000
27; CHECK64-NEXT:    shrl $8, %edi
28; CHECK64-NEXT:    orl %edi, %eax
29; CHECK64-NEXT:    retq
30  %byte0 = and i32 %x, 255        ; 0x000000ff
31  %byte1 = and i32 %x, 65280      ; 0x0000ff00
32  %byte2 = and i32 %x, 16711680   ; 0x00ff0000
33  %byte3 = or  i32 %x, 4278190080 ; 0xff000000
34  %tmp0 = shl  i32 %byte0, 8
35  %tmp1 = lshr i32 %byte1, 8
36  %tmp2 = shl  i32 %byte2, 8
37  %tmp3 = lshr i32 %byte3, 8
38  %or0 = or i32 %tmp0, %tmp1
39  %or1 = or i32 %tmp2, %tmp3
40  %result = or i32 %or0, %or1
41  ret i32 %result
42}
43
44; Don't match a near-miss 32-bit packed halfword bswap
45; (with swapped lshr/shl)
46; ((x >> 8) & 0x0000ff00) |
47; ((x << 8) & 0x000000ff) |
48; ((x << 8) & 0xff000000) |
49; ((x >> 8) & 0x00ff0000)
50define i32 @test2(i32 %x) nounwind {
51; CHECK-LABEL: test2:
52; CHECK:       # %bb.0:
53; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
54; CHECK-NEXT:    movl %ecx, %eax
55; CHECK-NEXT:    shrl $8, %eax
56; CHECK-NEXT:    shll $8, %ecx
57; CHECK-NEXT:    movl %eax, %edx
58; CHECK-NEXT:    andl $65280, %edx # imm = 0xFF00
59; CHECK-NEXT:    andl $-16777216, %ecx # imm = 0xFF000000
60; CHECK-NEXT:    andl $16711680, %eax # imm = 0xFF0000
61; CHECK-NEXT:    orl %ecx, %eax
62; CHECK-NEXT:    orl %edx, %eax
63; CHECK-NEXT:    retl
64;
65; CHECK64-LABEL: test2:
66; CHECK64:       # %bb.0:
67; CHECK64-NEXT:    movl %edi, %eax
68; CHECK64-NEXT:    shrl $8, %eax
69; CHECK64-NEXT:    shll $8, %edi
70; CHECK64-NEXT:    movl %eax, %ecx
71; CHECK64-NEXT:    andl $65280, %ecx # imm = 0xFF00
72; CHECK64-NEXT:    andl $-16777216, %edi # imm = 0xFF000000
73; CHECK64-NEXT:    andl $16711680, %eax # imm = 0xFF0000
74; CHECK64-NEXT:    orl %edi, %eax
75; CHECK64-NEXT:    orl %ecx, %eax
76; CHECK64-NEXT:    retq
77  %byte1 = lshr i32 %x, 8
78  %byte0 = shl  i32 %x, 8
79  %byte3 = shl  i32 %x, 8
80  %byte2 = lshr i32 %x, 8
81  %tmp1 = and i32 %byte1, 65280      ; 0x0000ff00
82  %tmp0 = and i32 %byte0, 255        ; 0x000000ff
83  %tmp3 = and i32 %byte3, 4278190080 ; 0xff000000
84  %tmp2 = and i32 %byte2, 16711680   ; 0x00ff0000
85  %or0 = or i32 %tmp0, %tmp1
86  %or1 = or i32 %tmp2, %tmp3
87  %result = or i32 %or0, %or1
88  ret i32 %result
89}
90
91; Invalid pattern involving a unary op
92define i32 @test3(float %x) nounwind {
93; CHECK-LABEL: test3:
94; CHECK:       # %bb.0:
95; CHECK-NEXT:    subl $8, %esp
96; CHECK-NEXT:    flds {{[0-9]+}}(%esp)
97; CHECK-NEXT:    fnstcw (%esp)
98; CHECK-NEXT:    movzwl (%esp), %eax
99; CHECK-NEXT:    orl $3072, %eax # imm = 0xC00
100; CHECK-NEXT:    movw %ax, {{[0-9]+}}(%esp)
101; CHECK-NEXT:    fldcw {{[0-9]+}}(%esp)
102; CHECK-NEXT:    fistpl {{[0-9]+}}(%esp)
103; CHECK-NEXT:    fldcw (%esp)
104; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
105; CHECK-NEXT:    movl %ecx, %edx
106; CHECK-NEXT:    shll $8, %edx
107; CHECK-NEXT:    movl %ecx, %eax
108; CHECK-NEXT:    shrl $8, %eax
109; CHECK-NEXT:    andl $65280, %ecx # imm = 0xFF00
110; CHECK-NEXT:    andl $-16777216, %edx # imm = 0xFF000000
111; CHECK-NEXT:    andl $16711680, %eax # imm = 0xFF0000
112; CHECK-NEXT:    orl %edx, %eax
113; CHECK-NEXT:    orl %ecx, %eax
114; CHECK-NEXT:    addl $8, %esp
115; CHECK-NEXT:    retl
116;
117; CHECK64-LABEL: test3:
118; CHECK64:       # %bb.0:
119; CHECK64-NEXT:    cvttss2si %xmm0, %ecx
120; CHECK64-NEXT:    movl %ecx, %edx
121; CHECK64-NEXT:    shll $8, %edx
122; CHECK64-NEXT:    movl %ecx, %eax
123; CHECK64-NEXT:    shrl $8, %eax
124; CHECK64-NEXT:    andl $65280, %ecx # imm = 0xFF00
125; CHECK64-NEXT:    andl $-16777216, %edx # imm = 0xFF000000
126; CHECK64-NEXT:    andl $16711680, %eax # imm = 0xFF0000
127; CHECK64-NEXT:    orl %edx, %eax
128; CHECK64-NEXT:    orl %ecx, %eax
129; CHECK64-NEXT:    retq
130  %integer = fptosi float %x to i32
131  %byte0 = shl  i32 %integer, 8
132  %byte3 = shl  i32 %integer, 8
133  %byte2 = lshr i32 %integer, 8
134  %tmp1 = and i32 %integer, 65280      ; 0x0000ff00
135  %tmp0 = and i32 %byte0,   255        ; 0x000000ff
136  %tmp3 = and i32 %byte3,   4278190080 ; 0xff000000
137  %tmp2 = and i32 %byte2,   16711680   ; 0x00ff0000
138  %or0 = or i32 %tmp0, %tmp1
139  %or1 = or i32 %tmp2, %tmp3
140  %result = or i32 %or0, %or1
141  ret i32 %result
142}
143