xref: /llvm-project/llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir (revision 60442f0d442723a487528bdd8b48b24657a025e8)
1# Start after bbsections0-prepare and check if the right code is generated.
2# RUN: llc -mtriple x86_64-unknown-linux-gnu -start-after=bbsections-prepare  %s -o - | FileCheck %s -check-prefix=CHECK
3
4
5# How to generate the input:
6# foo.cc
7# int foo(bool k) {
8#  if (k) return 1;
9#  return 0;
10# }
11#
12# clang -O0 -S -emit-llvm foo.cc
13# llc < foo.ll -stop-after=bbsections-prepare -basic-block-sections=all
14
15--- |
16  ; Function Attrs: noinline nounwind optnone uwtable
17  define dso_local i32 @_Z3foob(i1 zeroext %0) #0 {
18    %2 = alloca i32, align 4
19    %3 = alloca i8, align 1
20    %4 = zext i1 %0 to i8
21    store i8 %4, ptr %3, align 1
22    %5 = load i8, ptr %3, align 1
23    %6 = trunc i8 %5 to i1
24    br i1 %6, label %7, label %8
25
26  7:                                                ; preds = %1
27    store i32 1, ptr %2, align 4
28    br label %9
29
30  8:                                                ; preds = %1
31    store i32 0, ptr %2, align 4
32    br label %9
33
34  9:                                                ; preds = %8, %7
35    %10 = load i32, ptr %2, align 4
36    ret i32 %10
37  }
38
39  attributes #0 = { "frame-pointer"="all"  "target-cpu"="x86-64" }
40
41
42...
43---
44name:            _Z3foob
45alignment:       16
46exposesReturnsTwice: false
47legalized:       false
48regBankSelected: false
49selected:        false
50failedISel:      false
51tracksRegLiveness: true
52hasWinCFI:       false
53registers:       []
54liveins:
55  - { reg: '$edi', virtual-reg: '' }
56frameInfo:
57  isFrameAddressTaken: false
58  isReturnAddressTaken: false
59  hasStackMap:     false
60  hasPatchPoint:   false
61  stackSize:       8
62  offsetAdjustment: -8
63  maxAlignment:    4
64  adjustsStack:    false
65  hasCalls:        false
66  stackProtector:  ''
67  maxCallFrameSize: 0
68  cvBytesOfCalleeSavedRegisters: 0
69  hasOpaqueSPAdjustment: false
70  hasVAStart:      false
71  hasMustTailInVarArgFunc: false
72  localFrameSize:  0
73  savePoint:       ''
74  restorePoint:    ''
75fixedStack:
76  - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
77      callee-saved-register: '', callee-saved-restored: true, debug-info-variable: '',
78      debug-info-expression: '', debug-info-location: '' }
79stack:
80  - { id: 0, type: default, offset: -24, size: 4,
81      alignment: 4, stack-id: default, callee-saved-register: '', callee-saved-restored: true,
82      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
83  - { id: 1, type: default, offset: -17, size: 1,
84      alignment: 1, stack-id: default, callee-saved-register: '', callee-saved-restored: true,
85      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
86callSites:       []
87constants:       []
88machineFunctionInfo: {}
89body:             |
90  bb.0 (%ir-block.1, align 4, bbsections 0):
91    successors: %bb.2(0x40000000), %bb.1(0x40000000)
92    liveins: $edi
93
94    frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
95    CFI_INSTRUCTION def_cfa_offset 16
96    CFI_INSTRUCTION offset $rbp, -16
97    $rbp = frame-setup MOV64rr $rsp
98    CFI_INSTRUCTION def_cfa_register $rbp
99    renamable $dil = AND8ri renamable $dil, 1, implicit-def dead $eflags, implicit killed $edi, implicit-def $edi
100    MOV8mr $rbp, 1, $noreg, -1, $noreg, renamable $dil, implicit killed $edi :: (store (s8) into %ir.3)
101    TEST8mi $rbp, 1, $noreg, -1, $noreg, 1, implicit-def $eflags :: (load (s8) from %ir.3)
102    JCC_1 %bb.2, 4, implicit killed $eflags
103    JMP_1 %bb.1
104
105  bb.1 (%ir-block.7, bbsections 1):
106    successors: %bb.3(0x80000000)
107
108    MOV32mi $rbp, 1, $noreg, -8, $noreg, 1 :: (store (s32) into %ir.2)
109    JMP_1 %bb.3
110
111  bb.2 (%ir-block.8, bbsections 2):
112    successors: %bb.3(0x80000000)
113
114    MOV32mi $rbp, 1, $noreg, -8, $noreg, 0 :: (store (s32) into %ir.2)
115    JMP_1 %bb.3
116
117  bb.3 (%ir-block.9, bbsections 3):
118    renamable $eax = MOV32rm $rbp, 1, $noreg, -8, $noreg :: (load (s32) from %ir.2)
119    $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp
120    CFI_INSTRUCTION def_cfa $rsp, 8
121    RET64 implicit $eax
122
123...
124
125# CHECK: .section	.text._Z3foob,"ax",@progbits
126# CHECK: _Z3foob:
127# CHECK: .section	.text._Z3foob,"ax",@progbits,unique
128# CHECK: _Z3foob.__part.1:
129# CHECK: .section	.text._Z3foob,"ax",@progbits,unique
130# CHECK: _Z3foob.__part.2:
131# CHECK: .section	.text._Z3foob,"ax",@progbits,unique
132# CHECK: _Z3foob.__part.3:
133