xref: /llvm-project/llvm/test/CodeGen/X86/avx512fp16-rndscale.ll (revision b088536ce9e0473d6ab63c24ad69ca7ea2339a46) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512fp16 | FileCheck %s
3
4declare <8 x half> @llvm.ceil.v8f16(<8 x half>)
5declare <16 x half> @llvm.ceil.v16f16(<16 x half>)
6declare <32 x half> @llvm.ceil.v32f16(<32 x half>)
7
8define <8 x half> @ceil_v8f16(<8 x half> %p) {
9; CHECK-LABEL: ceil_v8f16:
10; CHECK:       ## %bb.0:
11; CHECK-NEXT:    vrndscaleph $10, %xmm0, %xmm0
12; CHECK-NEXT:    retq
13  %t = call <8 x half> @llvm.ceil.v8f16(<8 x half> %p)
14  ret <8 x half> %t
15}
16
17define <16 x half> @ceil_v16f16(<16 x half> %p) {
18; CHECK-LABEL: ceil_v16f16:
19; CHECK:       ## %bb.0:
20; CHECK-NEXT:    vrndscaleph $10, %ymm0, %ymm0
21; CHECK-NEXT:    retq
22  %t = call <16 x half> @llvm.ceil.v16f16(<16 x half> %p)
23  ret <16 x half> %t
24}
25
26define <32 x half> @ceil_v32f16(<32 x half> %p) {
27; CHECK-LABEL: ceil_v32f16:
28; CHECK:       ## %bb.0:
29; CHECK-NEXT:    vrndscaleph $10, %zmm0, %zmm0
30; CHECK-NEXT:    retq
31  %t = call <32 x half> @llvm.ceil.v32f16(<32 x half> %p)
32  ret <32 x half> %t
33}
34
35declare <8 x half> @llvm.floor.v8f16(<8 x half>)
36declare <16 x half> @llvm.floor.v16f16(<16 x half>)
37declare <32 x half> @llvm.floor.v32f16(<32 x half>)
38
39define <8 x half> @floor_v8f16(<8 x half> %p) {
40; CHECK-LABEL: floor_v8f16:
41; CHECK:       ## %bb.0:
42; CHECK-NEXT:    vrndscaleph $9, %xmm0, %xmm0
43; CHECK-NEXT:    retq
44  %t = call <8 x half> @llvm.floor.v8f16(<8 x half> %p)
45  ret <8 x half> %t
46}
47
48define <16 x half> @floor_v16f16(<16 x half> %p) {
49; CHECK-LABEL: floor_v16f16:
50; CHECK:       ## %bb.0:
51; CHECK-NEXT:    vrndscaleph $9, %ymm0, %ymm0
52; CHECK-NEXT:    retq
53  %t = call <16 x half> @llvm.floor.v16f16(<16 x half> %p)
54  ret <16 x half> %t
55}
56
57define <32 x half> @floor_v32f16(<32 x half> %p) {
58; CHECK-LABEL: floor_v32f16:
59; CHECK:       ## %bb.0:
60; CHECK-NEXT:    vrndscaleph $9, %zmm0, %zmm0
61; CHECK-NEXT:    retq
62  %t = call <32 x half> @llvm.floor.v32f16(<32 x half> %p)
63  ret <32 x half> %t
64}
65
66declare <8 x half> @llvm.trunc.v8f16(<8 x half>)
67declare <16 x half> @llvm.trunc.v16f16(<16 x half>)
68declare <32 x half> @llvm.trunc.v32f16(<32 x half>)
69
70define <8 x half> @trunc_v8f16(<8 x half> %p) {
71; CHECK-LABEL: trunc_v8f16:
72; CHECK:       ## %bb.0:
73; CHECK-NEXT:    vrndscaleph $11, %xmm0, %xmm0
74; CHECK-NEXT:    retq
75  %t = call <8 x half> @llvm.trunc.v8f16(<8 x half> %p)
76  ret <8 x half> %t
77}
78
79define <16 x half> @trunc_v16f16(<16 x half> %p) {
80; CHECK-LABEL: trunc_v16f16:
81; CHECK:       ## %bb.0:
82; CHECK-NEXT:    vrndscaleph $11, %ymm0, %ymm0
83; CHECK-NEXT:    retq
84  %t = call <16 x half> @llvm.trunc.v16f16(<16 x half> %p)
85  ret <16 x half> %t
86}
87
88define <32 x half> @trunc_v32f16(<32 x half> %p) {
89; CHECK-LABEL: trunc_v32f16:
90; CHECK:       ## %bb.0:
91; CHECK-NEXT:    vrndscaleph $11, %zmm0, %zmm0
92; CHECK-NEXT:    retq
93  %t = call <32 x half> @llvm.trunc.v32f16(<32 x half> %p)
94  ret <32 x half> %t
95}
96
97declare <8 x half> @llvm.nearbyint.v8f16(<8 x half>)
98declare <16 x half> @llvm.nearbyint.v16f16(<16 x half>)
99declare <32 x half> @llvm.nearbyint.v32f16(<32 x half>)
100
101define <8 x half> @nearbyint_v8f16(<8 x half> %p) {
102; CHECK-LABEL: nearbyint_v8f16:
103; CHECK:       ## %bb.0:
104; CHECK-NEXT:    vrndscaleph $12, %xmm0, %xmm0
105; CHECK-NEXT:    retq
106  %t = call <8 x half> @llvm.nearbyint.v8f16(<8 x half> %p)
107  ret <8 x half> %t
108}
109
110define <16 x half> @nearbyint_v16f16(<16 x half> %p) {
111; CHECK-LABEL: nearbyint_v16f16:
112; CHECK:       ## %bb.0:
113; CHECK-NEXT:    vrndscaleph $12, %ymm0, %ymm0
114; CHECK-NEXT:    retq
115  %t = call <16 x half> @llvm.nearbyint.v16f16(<16 x half> %p)
116  ret <16 x half> %t
117}
118
119define <32 x half> @nearbyint_v32f16(<32 x half> %p) {
120; CHECK-LABEL: nearbyint_v32f16:
121; CHECK:       ## %bb.0:
122; CHECK-NEXT:    vrndscaleph $12, %zmm0, %zmm0
123; CHECK-NEXT:    retq
124  %t = call <32 x half> @llvm.nearbyint.v32f16(<32 x half> %p)
125  ret <32 x half> %t
126}
127
128declare <8 x half> @llvm.rint.v8f16(<8 x half>)
129declare <16 x half> @llvm.rint.v16f16(<16 x half>)
130declare <32 x half> @llvm.rint.v32f16(<32 x half>)
131
132define <8 x half> @rint_v8f16(<8 x half> %p) {
133; CHECK-LABEL: rint_v8f16:
134; CHECK:       ## %bb.0:
135; CHECK-NEXT:    vrndscaleph $4, %xmm0, %xmm0
136; CHECK-NEXT:    retq
137  %t = call <8 x half> @llvm.rint.v8f16(<8 x half> %p)
138  ret <8 x half> %t
139}
140
141define <16 x half> @rint_v16f16(<16 x half> %p) {
142; CHECK-LABEL: rint_v16f16:
143; CHECK:       ## %bb.0:
144; CHECK-NEXT:    vrndscaleph $4, %ymm0, %ymm0
145; CHECK-NEXT:    retq
146  %t = call <16 x half> @llvm.rint.v16f16(<16 x half> %p)
147  ret <16 x half> %t
148}
149
150define <32 x half> @rint_v32f16(<32 x half> %p) {
151; CHECK-LABEL: rint_v32f16:
152; CHECK:       ## %bb.0:
153; CHECK-NEXT:    vrndscaleph $4, %zmm0, %zmm0
154; CHECK-NEXT:    retq
155  %t = call <32 x half> @llvm.rint.v32f16(<32 x half> %p)
156  ret <32 x half> %t
157}
158