xref: /llvm-project/llvm/test/CodeGen/X86/avx512fp16-insert-extract.ll (revision 6f7f5b54c81be59ec7876649d1f9aa6b104658ec) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=CHECK
3
4define <8 x half> @extract_v16f16_v8f16_0(<16 x half> %x) {
5; CHECK-LABEL: extract_v16f16_v8f16_0:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
8; CHECK-NEXT:    vzeroupper
9; CHECK-NEXT:    retq
10  %a = shufflevector <16 x half> %x, <16 x half> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
11  ret <8 x half> %a
12}
13
14define <8 x half> @extract_v16f16_v8f16_1(<16 x half> %x) {
15; CHECK-LABEL: extract_v16f16_v8f16_1:
16; CHECK:       # %bb.0:
17; CHECK-NEXT:    vextractf128 $1, %ymm0, %xmm0
18; CHECK-NEXT:    vzeroupper
19; CHECK-NEXT:    retq
20  %a = shufflevector <16 x half> %x, <16 x half> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
21  ret <8 x half> %a
22}
23
24define <8 x half> @extract_v32f16_v8f16_0(<32 x half> %x) {
25; CHECK-LABEL: extract_v32f16_v8f16_0:
26; CHECK:       # %bb.0:
27; CHECK-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
28; CHECK-NEXT:    vzeroupper
29; CHECK-NEXT:    retq
30  %a = shufflevector <32 x half> %x, <32 x half> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
31  ret <8 x half> %a
32}
33
34define <8 x half> @extract_v32f16_v8f16_1(<32 x half> %x) {
35; CHECK-LABEL: extract_v32f16_v8f16_1:
36; CHECK:       # %bb.0:
37; CHECK-NEXT:    vextractf128 $1, %ymm0, %xmm0
38; CHECK-NEXT:    vzeroupper
39; CHECK-NEXT:    retq
40  %a = shufflevector <32 x half> %x, <32 x half> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
41  ret <8 x half> %a
42}
43
44define <8 x half> @extract_v32f16_v8f16_2(<32 x half> %x) {
45; CHECK-LABEL: extract_v32f16_v8f16_2:
46; CHECK:       # %bb.0:
47; CHECK-NEXT:    vextractf32x4 $2, %zmm0, %xmm0
48; CHECK-NEXT:    vzeroupper
49; CHECK-NEXT:    retq
50  %a = shufflevector <32 x half> %x, <32 x half> undef, <8 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>
51  ret <8 x half> %a
52}
53
54define <8 x half> @extract_v32f16_v8f16_3(<32 x half> %x) {
55; CHECK-LABEL: extract_v32f16_v8f16_3:
56; CHECK:       # %bb.0:
57; CHECK-NEXT:    vextractf32x4 $3, %zmm0, %xmm0
58; CHECK-NEXT:    vzeroupper
59; CHECK-NEXT:    retq
60  %a = shufflevector <32 x half> %x, <32 x half> undef, <8 x i32> <i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
61  ret <8 x half> %a
62}
63
64define <16 x half> @extract_v32f16_v81616_0(<32 x half> %x) {
65; CHECK-LABEL: extract_v32f16_v81616_0:
66; CHECK:       # %bb.0:
67; CHECK-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
68; CHECK-NEXT:    retq
69  %a = shufflevector <32 x half> %x, <32 x half> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
70  ret <16 x half> %a
71}
72
73define <16 x half> @extract_v32f16_v81616_1(<32 x half> %x) {
74; CHECK-LABEL: extract_v32f16_v81616_1:
75; CHECK:       # %bb.0:
76; CHECK-NEXT:    vextractf64x4 $1, %zmm0, %ymm0
77; CHECK-NEXT:    retq
78  %a = shufflevector <32 x half> %x, <32 x half> undef, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
79  ret <16 x half> %a
80}
81
82define <16 x half> @concat_v8f16(<8 x half> %x, <8 x half> %y) {
83; CHECK-LABEL: concat_v8f16:
84; CHECK:       # %bb.0:
85; CHECK-NEXT:    # kill: def $xmm0 killed $xmm0 def $ymm0
86; CHECK-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
87; CHECK-NEXT:    retq
88  %a = shufflevector <8 x half> %x, <8 x half> %y, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
89  ret <16 x half> %a
90}
91
92define <32 x half> @concat_v16f16(<16 x half> %x, <16 x half> %y) {
93; CHECK-LABEL: concat_v16f16:
94; CHECK:       # %bb.0:
95; CHECK-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
96; CHECK-NEXT:    vinsertf64x4 $1, %ymm1, %zmm0, %zmm0
97; CHECK-NEXT:    retq
98  %a = shufflevector <16 x half> %x, <16 x half> %y, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
99  ret <32 x half> %a
100}
101
102define <16 x half> @concat_zero_v8f16(<8 x half> %x, <8 x half> %y) {
103; CHECK-LABEL: concat_zero_v8f16:
104; CHECK:       # %bb.0:
105; CHECK-NEXT:    vmovaps %xmm0, %xmm0
106; CHECK-NEXT:    retq
107  %a = shufflevector <8 x half> %x, <8 x half> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
108  ret <16 x half> %a
109}
110
111define <32 x half> @concat_zero_v16f16(<16 x half> %x, <16 x half> %y) {
112; CHECK-LABEL: concat_zero_v16f16:
113; CHECK:       # %bb.0:
114; CHECK-NEXT:    vmovaps %ymm0, %ymm0
115; CHECK-NEXT:    retq
116  %a = shufflevector <16 x half> %x, <16 x half> zeroinitializer, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
117  ret <32 x half> %a
118}
119
120define <32 x half> @insert_v8f16_v32f16_0(<32 x half> %x, <8 x half> %y) {
121; CHECK-LABEL: insert_v8f16_v32f16_0:
122; CHECK:       # %bb.0:
123; CHECK-NEXT:    vinsertf32x4 $0, %xmm1, %zmm0, %zmm0
124; CHECK-NEXT:    retq
125  %a = shufflevector <8 x half> %y, <8 x half> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
126  %b = shufflevector <32 x half> %x, <32 x half> %a, <32 x i32> <i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
127  ret <32 x half> %b
128}
129
130define <32 x half> @insert_v8f16_v32f16_1(<32 x half> %x, <8 x half> %y) {
131; CHECK-LABEL: insert_v8f16_v32f16_1:
132; CHECK:       # %bb.0:
133; CHECK-NEXT:    vinsertf32x4 $1, %xmm1, %zmm0, %zmm0
134; CHECK-NEXT:    retq
135  %a = shufflevector <8 x half> %y, <8 x half> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
136  %b = shufflevector <32 x half> %x, <32 x half> %a, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
137  ret <32 x half> %b
138}
139
140define <32 x half> @insert_v8f16_v32f16_2(<32 x half> %x, <8 x half> %y) {
141; CHECK-LABEL: insert_v8f16_v32f16_2:
142; CHECK:       # %bb.0:
143; CHECK-NEXT:    vinsertf32x4 $2, %xmm1, %zmm0, %zmm0
144; CHECK-NEXT:    retq
145  %a = shufflevector <8 x half> %y, <8 x half> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
146  %b = shufflevector <32 x half> %x, <32 x half> %a, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
147  ret <32 x half> %b
148}
149
150define <32 x half> @insert_v8f16_v32f16_3(<32 x half> %x, <8 x half> %y) {
151; CHECK-LABEL: insert_v8f16_v32f16_3:
152; CHECK:       # %bb.0:
153; CHECK-NEXT:    vinsertf32x4 $3, %xmm1, %zmm0, %zmm0
154; CHECK-NEXT:    retq
155  %a = shufflevector <8 x half> %y, <8 x half> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
156  %b = shufflevector <32 x half> %x, <32 x half> %a, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39>
157  ret <32 x half> %b
158}
159