xref: /llvm-project/llvm/test/CodeGen/X86/avx512f-256-set0.mir (revision 6e83c0a1cbfdb0c0f13c282312c47c7945970f55)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=x86_64-- -mattr=+avx512f -o - %s -run-pass=postrapseudos -verify-machineinstrs | FileCheck %s
3
4# Test that we emit VPXORD with ZMM registers instead of YMM
5# registers when we do not have VLX.
6
7--- |
8  ; ModuleID = 'test.ll'
9  source_filename = "test.ll"
10  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
11  target triple = "x86_64-unknown-linux-gnu"
12
13  @tst_ = common global [4 x i64] zeroinitializer, align 64
14
15  define void @main() #0 {
16  bb0:
17    %gep1 = bitcast ptr @tst_ to ptr
18    %lsr.iv1 = bitcast ptr %gep1 to ptr
19    store <4 x i64> zeroinitializer, ptr %lsr.iv1, align 16
20    ret void
21  }
22
23  attributes #0 = { "target-features"="+avx512f" }
24
25...
26---
27name:            main
28alignment:       16
29exposesReturnsTwice: false
30legalized:       false
31regBankSelected: false
32selected:        false
33failedISel:      false
34tracksRegLiveness: true
35hasWinCFI:       false
36registers:       []
37liveins:         []
38frameInfo:
39  isFrameAddressTaken: false
40  isReturnAddressTaken: false
41  hasStackMap:     false
42  hasPatchPoint:   false
43  stackSize:       0
44  offsetAdjustment: 0
45  maxAlignment:    0
46  adjustsStack:    false
47  hasCalls:        false
48  stackProtector:  ''
49  maxCallFrameSize: 0
50  cvBytesOfCalleeSavedRegisters: 0
51  hasOpaqueSPAdjustment: false
52  hasVAStart:      false
53  hasMustTailInVarArgFunc: false
54  localFrameSize:  0
55  savePoint:       ''
56  restorePoint:    ''
57fixedStack:      []
58stack:           []
59constants:       []
60machineFunctionInfo: {}
61body:             |
62  bb.0.bb0:
63    ; CHECK-LABEL: name: main
64    ; CHECK: $zmm16 = VPXORDZrr undef $zmm16, undef $zmm16
65    ; CHECK: VMOVAPSZmr $rip, 1, $noreg, @tst_, $noreg, killed renamable $zmm16 :: (store (s256) into %ir.lsr.iv1, align 64)
66    ; CHECK: RET 0
67    renamable $ymm16 = AVX512_256_SET0
68    VMOVAPSZmr $rip, 1, $noreg, @tst_, $noreg, killed renamable $zmm16 :: (store (s256) into %ir.lsr.iv1, align 64)
69    RET 0
70
71...
72