xref: /llvm-project/llvm/test/CodeGen/X86/atomic-nocx16.ll (revision 6e83c0a1cbfdb0c0f13c282312c47c7945970f55)
1; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=corei7 -mattr=-cx16 | FileCheck %s
2; RUN: llc < %s -mtriple=i386-linux-gnu -verify-machineinstrs -mattr=cx16 | FileCheck -check-prefix=CHECK32 %s
3
4;; Verify that 128-bit atomics emit a libcall without cx16
5;; available.
6;;
7;; We test 32-bit mode with -mattr=cx16, because it should have no
8;; effect for 32-bit mode.
9
10; CHECK-LABEL: test:
11define void @test(ptr %a) nounwind {
12entry:
13; CHECK: __atomic_compare_exchange_16
14; CHECK32: __atomic_compare_exchange
15  %0 = cmpxchg ptr %a, i128 1, i128 1 seq_cst seq_cst
16; CHECK: __atomic_exchange_16
17; CHECK32: __atomic_exchange
18  %1 = atomicrmw xchg ptr %a, i128 1 seq_cst
19; CHECK: __atomic_fetch_add_16
20; CHECK32: __atomic_compare_exchange
21  %2 = atomicrmw add ptr %a, i128 1 seq_cst
22; CHECK: __atomic_fetch_sub_16
23; CHECK32: __atomic_compare_exchange
24  %3 = atomicrmw sub ptr %a, i128 1 seq_cst
25; CHECK: __atomic_fetch_and_16
26; CHECK32: __atomic_compare_exchange
27  %4 = atomicrmw and ptr %a, i128 1 seq_cst
28; CHECK: __atomic_fetch_nand_16
29; CHECK32: __atomic_compare_exchange
30  %5 = atomicrmw nand ptr %a, i128 1 seq_cst
31; CHECK: __atomic_fetch_or_16
32; CHECK32: __atomic_compare_exchange
33  %6 = atomicrmw or ptr %a, i128 1 seq_cst
34; CHECK: __atomic_fetch_xor_16
35; CHECK32: __atomic_compare_exchange
36  %7 = atomicrmw xor ptr %a, i128 1 seq_cst
37; CHECK: __atomic_load_16
38; CHECK32: __atomic_load
39  %8 = load atomic i128, ptr %a seq_cst, align 16
40; CHECK: __atomic_store_16
41; CHECK32: __atomic_store
42  store atomic i128 %8, ptr %a seq_cst, align 16
43  ret void
44}
45
46; CHECK-LABEL: test_fp:
47define void @test_fp(ptr %a) nounwind {
48entry:
49; CHECK: __atomic_exchange_16
50; CHECK32: __atomic_exchange
51  %0 = atomicrmw xchg ptr %a, fp128 0xL00000000000000004000900000000000 seq_cst
52; CHECK: __atomic_compare_exchange_16
53; CHECK32: __atomic_compare_exchange
54  %1 = atomicrmw fadd ptr %a, fp128 0xL00000000000000004000900000000000 seq_cst
55; CHECK: __atomic_compare_exchange_16
56; CHECK32: __atomic_compare_exchange
57  %2 = atomicrmw fsub ptr %a, fp128 0xL00000000000000004000900000000000 seq_cst
58; CHECK: __atomic_load_16
59; CHECK32: __atomic_load
60  %3 = load atomic fp128, ptr %a seq_cst, align 16
61; CHECK: __atomic_store_16
62; CHECK32: __atomic_store
63  store atomic fp128 %3, ptr %a seq_cst, align 16
64  ret void
65}
66