xref: /llvm-project/llvm/test/CodeGen/X86/apx/shrd.ll (revision 66237d647ed95d7df92a438f8181c11423addc7d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s
3
4define i16 @shrd16rrcl(i16 noundef %a, i16 noundef %b, i8 %cl) {
5; CHECK-LABEL: shrd16rrcl:
6; CHECK:       # %bb.0: # %entry
7; CHECK-NEXT:    andb $15, %dl, %cl
8; CHECK-NEXT:    shrdw %cl, %di, %si, %ax
9; CHECK-NEXT:    retq
10entry:
11    %clin = sext i8 %cl to i16
12    %shrd = call i16 @llvm.fshr.i16(i16 %a, i16 %b, i16 %clin)
13    ret i16 %shrd
14}
15
16define i16 @shrd16rrcl_mask(i16 noundef %a, i16 noundef %b, i8 %cl) {
17; CHECK-LABEL: shrd16rrcl_mask:
18; CHECK:       # %bb.0: # %entry
19; CHECK-NEXT:    andb $15, %dl, %cl
20; CHECK-NEXT:    shrdw %cl, %di, %si, %ax
21; CHECK-NEXT:    retq
22entry:
23    %clin = sext i8 %cl to i16
24    %shamt = and i16 %clin, 31
25    %shrd = call i16 @llvm.fshr.i16(i16 %a, i16 %b, i16 %shamt)
26    ret i16 %shrd
27}
28
29define i32 @shrd32rrcl(i32 noundef %a, i32 noundef %b, i8 %cl) {
30; CHECK-LABEL: shrd32rrcl:
31; CHECK:       # %bb.0: # %entry
32; CHECK-NEXT:    movl %edx, %ecx
33; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
34; CHECK-NEXT:    shrdl %cl, %edi, %esi, %eax
35; CHECK-NEXT:    retq
36entry:
37    %clin = sext i8 %cl to i32
38    %shrd = call i32 @llvm.fshr.i32(i32 %a, i32 %b, i32 %clin)
39    ret i32 %shrd
40}
41
42define i32 @shrd32rrcl_mask(i32 noundef %a, i32 noundef %b, i8 %cl) {
43; CHECK-LABEL: shrd32rrcl_mask:
44; CHECK:       # %bb.0: # %entry
45; CHECK-NEXT:    movl %edx, %ecx
46; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
47; CHECK-NEXT:    shrdl %cl, %edi, %esi, %eax
48; CHECK-NEXT:    retq
49entry:
50    %clin = sext i8 %cl to i32
51    %shamt = and i32 %clin, 31
52    %shrd = call i32 @llvm.fshr.i32(i32 %a, i32 %b, i32 %shamt)
53    ret i32 %shrd
54}
55
56define i64 @shrd64rrcl(i64 noundef %a, i64 noundef %b, i8 %cl) {
57; CHECK-LABEL: shrd64rrcl:
58; CHECK:       # %bb.0: # %entry
59; CHECK-NEXT:    movl %edx, %ecx
60; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
61; CHECK-NEXT:    shrdq %cl, %rdi, %rsi, %rax
62; CHECK-NEXT:    retq
63entry:
64    %clin = sext i8 %cl to i64
65    %shrd = call i64 @llvm.fshr.i64(i64 %a, i64 %b, i64 %clin)
66    ret i64 %shrd
67}
68
69define i64 @shrd64rrcl_mask(i64 noundef %a, i64 noundef %b, i8 %cl) {
70; CHECK-LABEL: shrd64rrcl_mask:
71; CHECK:       # %bb.0: # %entry
72; CHECK-NEXT:    movl %edx, %ecx
73; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
74; CHECK-NEXT:    shrdq %cl, %rdi, %rsi, %rax
75; CHECK-NEXT:    retq
76entry:
77    %clin = sext i8 %cl to i64
78    %shamt = and i64 %clin, 63
79    %shrd = call i64 @llvm.fshr.i64(i64 %a, i64 %b, i64 %shamt)
80    ret i64 %shrd
81}
82
83define i16 @shrd16rri8(i16 noundef %a, i16 noundef %b) {
84; CHECK-LABEL: shrd16rri8:
85; CHECK:       # %bb.0: # %entry
86; CHECK-NEXT:    shrdw $12, %di, %si, %ax
87; CHECK-NEXT:    retq
88entry:
89    %shrd = call i16 @llvm.fshr.i16(i16 %a, i16 %b, i16 12)
90    ret i16 %shrd
91}
92
93define i32 @shrd32rri8(i32 noundef %a, i32 noundef %b) {
94; CHECK-LABEL: shrd32rri8:
95; CHECK:       # %bb.0: # %entry
96; CHECK-NEXT:    shrdl $12, %edi, %esi, %eax
97; CHECK-NEXT:    retq
98entry:
99    %shrd = call i32 @llvm.fshr.i32(i32 %a, i32 %b, i32 12)
100    ret i32 %shrd
101}
102
103define i64 @shrd64rri8(i64 noundef %a, i64 noundef %b) {
104; CHECK-LABEL: shrd64rri8:
105; CHECK:       # %bb.0: # %entry
106; CHECK-NEXT:    shrdq $12, %rdi, %rsi, %rax
107; CHECK-NEXT:    retq
108entry:
109    %shrd = call i64 @llvm.fshr.i64(i64 %a, i64 %b, i64 12)
110    ret i64 %shrd
111}
112
113define i16 @shrd16mrcl(ptr %ptr, i16 noundef %b, i8 %cl) {
114; CHECK-LABEL: shrd16mrcl:
115; CHECK:       # %bb.0: # %entry
116; CHECK-NEXT:    movzwl (%rdi), %eax
117; CHECK-NEXT:    andb $15, %dl, %cl
118; CHECK-NEXT:    shrdw %cl, %ax, %si, %ax
119; CHECK-NEXT:    retq
120entry:
121    %a = load i16, ptr %ptr
122    %clin = sext i8 %cl to i16
123    %shrd = call i16 @llvm.fshr.i16(i16 %a, i16 %b, i16 %clin)
124    ret i16 %shrd
125}
126
127define i32 @shrd32mrcl(ptr %ptr, i32 noundef %b, i8 %cl) {
128; CHECK-LABEL: shrd32mrcl:
129; CHECK:       # %bb.0: # %entry
130; CHECK-NEXT:    movl %edx, %ecx
131; CHECK-NEXT:    movl (%rdi), %eax
132; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
133; CHECK-NEXT:    shrdl %cl, %eax, %esi, %eax
134; CHECK-NEXT:    retq
135entry:
136    %a = load i32, ptr %ptr
137    %clin = sext i8 %cl to i32
138    %shrd = call i32 @llvm.fshr.i32(i32 %a, i32 %b, i32 %clin)
139    ret i32 %shrd
140}
141
142define i64 @shrd64mrcl(ptr %ptr, i64 noundef %b, i8 %cl) {
143; CHECK-LABEL: shrd64mrcl:
144; CHECK:       # %bb.0: # %entry
145; CHECK-NEXT:    movl %edx, %ecx
146; CHECK-NEXT:    movq (%rdi), %rax
147; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
148; CHECK-NEXT:    shrdq %cl, %rax, %rsi, %rax
149; CHECK-NEXT:    retq
150entry:
151    %a = load i64, ptr %ptr
152    %clin = sext i8 %cl to i64
153    %shrd = call i64 @llvm.fshr.i64(i64 %a, i64 %b, i64 %clin)
154    ret i64 %shrd
155}
156
157define i16 @shrd16mri8(ptr %ptr, i16 noundef %b) {
158; CHECK-LABEL: shrd16mri8:
159; CHECK:       # %bb.0: # %entry
160; CHECK-NEXT:    shldw $4, %si, (%rdi), %ax
161; CHECK-NEXT:    retq
162entry:
163    %a = load i16, ptr %ptr
164    %shrd = call i16 @llvm.fshr.i16(i16 %a, i16 %b, i16 12)
165    ret i16 %shrd
166}
167
168define i32 @shrd32mri8(ptr %ptr, i32 noundef %b) {
169; CHECK-LABEL: shrd32mri8:
170; CHECK:       # %bb.0: # %entry
171; CHECK-NEXT:    shldl $20, %esi, (%rdi), %eax
172; CHECK-NEXT:    retq
173entry:
174    %a = load i32, ptr %ptr
175    %shrd = call i32 @llvm.fshr.i32(i32 %a, i32 %b, i32 12)
176    ret i32 %shrd
177}
178
179define i64 @shrd64mri8(ptr %ptr, i64 noundef %b) {
180; CHECK-LABEL: shrd64mri8:
181; CHECK:       # %bb.0: # %entry
182; CHECK-NEXT:    shldq $52, %rsi, (%rdi), %rax
183; CHECK-NEXT:    retq
184entry:
185    %a = load i64, ptr %ptr
186    %shrd = call i64 @llvm.fshr.i64(i64 %a, i64 %b, i64 12)
187    ret i64 %shrd
188}
189
190define void @shrd16mrcl_legacy(ptr %ptr, i16 noundef %b, i8 %cl) {
191; CHECK-LABEL: shrd16mrcl_legacy:
192; CHECK:       # %bb.0: # %entry
193; CHECK-NEXT:    andb $15, %dl, %cl
194; CHECK-NEXT:    shrdw %cl, %si, (%rdi)
195; CHECK-NEXT:    retq
196entry:
197    %a = load i16, ptr %ptr
198    %clin = sext i8 %cl to i16
199    %shrd = call i16 @llvm.fshr.i16(i16 %b, i16 %a, i16 %clin)
200    store i16 %shrd, ptr %ptr
201    ret void
202}
203
204define void @shrd32mrcl_legacy(ptr %ptr, i32 noundef %b, i8 %cl) {
205; CHECK-LABEL: shrd32mrcl_legacy:
206; CHECK:       # %bb.0: # %entry
207; CHECK-NEXT:    movl %edx, %ecx
208; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
209; CHECK-NEXT:    shrdl %cl, %esi, (%rdi)
210; CHECK-NEXT:    retq
211entry:
212    %a = load i32, ptr %ptr
213    %clin = sext i8 %cl to i32
214    %shrd = call i32 @llvm.fshr.i32(i32 %b, i32 %a, i32 %clin)
215    store i32 %shrd, ptr %ptr
216    ret void
217}
218
219define void @shrd64mrcl_legacy(ptr %ptr, i64 noundef %b, i8 %cl) {
220; CHECK-LABEL: shrd64mrcl_legacy:
221; CHECK:       # %bb.0: # %entry
222; CHECK-NEXT:    movl %edx, %ecx
223; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
224; CHECK-NEXT:    shrdq %cl, %rsi, (%rdi)
225; CHECK-NEXT:    retq
226entry:
227    %a = load i64, ptr %ptr
228    %clin = sext i8 %cl to i64
229    %shrd = call i64 @llvm.fshr.i64(i64 %b, i64 %a, i64 %clin)
230    store i64 %shrd, ptr %ptr
231    ret void
232}
233
234define void @shrd16mri8_legacy(ptr %ptr, i16 noundef %b) {
235; CHECK-LABEL: shrd16mri8_legacy:
236; CHECK:       # %bb.0: # %entry
237; CHECK-NEXT:    shrdw $12, %si, (%rdi)
238; CHECK-NEXT:    retq
239entry:
240    %a = load i16, ptr %ptr
241    %shrd = call i16 @llvm.fshr.i16(i16 %b, i16 %a, i16 12)
242    store i16 %shrd, ptr %ptr
243    ret void
244}
245
246define void @shrd32mri8_legacy(ptr %ptr, i32 noundef %b) {
247; CHECK-LABEL: shrd32mri8_legacy:
248; CHECK:       # %bb.0: # %entry
249; CHECK-NEXT:    shrdl $12, %esi, (%rdi)
250; CHECK-NEXT:    retq
251entry:
252    %a = load i32, ptr %ptr
253    %shrd = call i32 @llvm.fshr.i32(i32 %b, i32 %a, i32 12)
254    store i32 %shrd, ptr %ptr
255    ret void
256}
257
258define void @shrd64mri8_legacy(ptr %ptr, i64 noundef %b) {
259; CHECK-LABEL: shrd64mri8_legacy:
260; CHECK:       # %bb.0: # %entry
261; CHECK-NEXT:    shrdq $12, %rsi, (%rdi)
262; CHECK-NEXT:    retq
263entry:
264    %a = load i64, ptr %ptr
265    %shrd = call i64 @llvm.fshr.i64(i64 %b, i64 %a, i64 12)
266    store i64 %shrd, ptr %ptr
267    ret void
268}
269