xref: /llvm-project/llvm/test/CodeGen/X86/apx/shld.ll (revision 5c68c6d70fc204b0efdb2af95dfb328d616129e3)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s
3
4define i16 @shld16rrcl(i16 noundef %a, i16 noundef %b, i8 %cl) {
5; CHECK-LABEL: shld16rrcl:
6; CHECK:       # %bb.0: # %entry
7; CHECK-NEXT:    andb $15, %dl, %cl
8; CHECK-NEXT:    shldw %cl, %si, %di, %ax
9; CHECK-NEXT:    retq
10entry:
11    %clin = sext i8 %cl to i16
12    %shld = call i16 @llvm.fshl.i16(i16 %a, i16 %b, i16 %clin)
13    ret i16 %shld
14}
15
16define i16 @shld16rrcl_mask(i16 noundef %a, i16 noundef %b, i8 %cl) {
17; CHECK-LABEL: shld16rrcl_mask:
18; CHECK:       # %bb.0: # %entry
19; CHECK-NEXT:    andb $15, %dl, %cl
20; CHECK-NEXT:    shldw %cl, %si, %di, %ax
21; CHECK-NEXT:    retq
22entry:
23    %clin = sext i8 %cl to i16
24    %shamt = and i16 %clin, 31
25    %shld = call i16 @llvm.fshl.i16(i16 %a, i16 %b, i16 %shamt)
26    ret i16 %shld
27}
28
29define i32 @shld32rrcl(i32 noundef %a, i32 noundef %b, i8 %cl) {
30; CHECK-LABEL: shld32rrcl:
31; CHECK:       # %bb.0: # %entry
32; CHECK-NEXT:    movl %edx, %ecx
33; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
34; CHECK-NEXT:    shldl %cl, %esi, %edi, %eax
35; CHECK-NEXT:    retq
36entry:
37    %clin = sext i8 %cl to i32
38    %shld = call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 %clin)
39    ret i32 %shld
40}
41
42define i32 @shld32rrcl_mask(i32 noundef %a, i32 noundef %b, i8 %cl) {
43; CHECK-LABEL: shld32rrcl_mask:
44; CHECK:       # %bb.0: # %entry
45; CHECK-NEXT:    movl %edx, %ecx
46; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
47; CHECK-NEXT:    shldl %cl, %esi, %edi, %eax
48; CHECK-NEXT:    retq
49entry:
50    %clin = sext i8 %cl to i32
51    %shamt = and i32 %clin, 31
52    %shld = call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 %shamt)
53    ret i32 %shld
54}
55
56define i64 @shld64rrcl(i64 noundef %a, i64 noundef %b, i8 %cl) {
57; CHECK-LABEL: shld64rrcl:
58; CHECK:       # %bb.0: # %entry
59; CHECK-NEXT:    movl %edx, %ecx
60; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
61; CHECK-NEXT:    shldq %cl, %rsi, %rdi, %rax
62; CHECK-NEXT:    retq
63entry:
64    %clin = sext i8 %cl to i64
65    %shld = call i64 @llvm.fshl.i64(i64 %a, i64 %b, i64 %clin)
66    ret i64 %shld
67}
68
69define i64 @shld64rrcl_mask(i64 noundef %a, i64 noundef %b, i8 %cl) {
70; CHECK-LABEL: shld64rrcl_mask:
71; CHECK:       # %bb.0: # %entry
72; CHECK-NEXT:    movl %edx, %ecx
73; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
74; CHECK-NEXT:    shldq %cl, %rsi, %rdi, %rax
75; CHECK-NEXT:    retq
76entry:
77    %clin = sext i8 %cl to i64
78    %shamt = and i64 %clin, 63
79    %shld = call i64 @llvm.fshl.i64(i64 %a, i64 %b, i64 %clin)
80    ret i64 %shld
81}
82
83define i16 @shld16rri8(i16 noundef %a, i16 noundef %b) {
84; CHECK-LABEL: shld16rri8:
85; CHECK:       # %bb.0: # %entry
86; CHECK-NEXT:    shldw $12, %si, %di, %ax
87; CHECK-NEXT:    retq
88entry:
89    %shld = call i16 @llvm.fshl.i16(i16 %a, i16 %b, i16 12)
90    ret i16 %shld
91}
92
93define i32 @shld32rri8(i32 noundef %a, i32 noundef %b) {
94; CHECK-LABEL: shld32rri8:
95; CHECK:       # %bb.0: # %entry
96; CHECK-NEXT:    shldl $12, %esi, %edi, %eax
97; CHECK-NEXT:    retq
98entry:
99    %shld = call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 12)
100    ret i32 %shld
101}
102
103define i64 @shld64rri8(i64 noundef %a, i64 noundef %b) {
104; CHECK-LABEL: shld64rri8:
105; CHECK:       # %bb.0: # %entry
106; CHECK-NEXT:    shldq $12, %rsi, %rdi, %rax
107; CHECK-NEXT:    retq
108entry:
109    %shld = call i64 @llvm.fshl.i64(i64 %a, i64 %b, i64 12)
110    ret i64 %shld
111}
112
113define i16 @shld16mrcl(ptr %ptr, i16 noundef %b, i8 %cl) {
114; CHECK-LABEL: shld16mrcl:
115; CHECK:       # %bb.0: # %entry
116; CHECK-NEXT:    andb $15, %dl, %cl
117; CHECK-NEXT:    shldw %cl, %si, (%rdi), %ax
118; CHECK-NEXT:    retq
119entry:
120    %a = load i16, ptr %ptr
121    %clin = sext i8 %cl to i16
122    %shld = call i16 @llvm.fshl.i16(i16 %a, i16 %b, i16 %clin)
123    ret i16 %shld
124}
125
126define i32 @shld32mrcl(ptr %ptr, i32 noundef %b, i8 %cl) {
127; CHECK-LABEL: shld32mrcl:
128; CHECK:       # %bb.0: # %entry
129; CHECK-NEXT:    movl %edx, %ecx
130; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
131; CHECK-NEXT:    shldl %cl, %esi, (%rdi), %eax
132; CHECK-NEXT:    retq
133entry:
134    %a = load i32, ptr %ptr
135    %clin = sext i8 %cl to i32
136    %shld = call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 %clin)
137    ret i32 %shld
138}
139
140define i64 @shld64mrcl(ptr %ptr, i64 noundef %b, i8 %cl) {
141; CHECK-LABEL: shld64mrcl:
142; CHECK:       # %bb.0: # %entry
143; CHECK-NEXT:    movl %edx, %ecx
144; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
145; CHECK-NEXT:    shldq %cl, %rsi, (%rdi), %rax
146; CHECK-NEXT:    retq
147entry:
148    %a = load i64, ptr %ptr
149    %clin = sext i8 %cl to i64
150    %shld = call i64 @llvm.fshl.i64(i64 %a, i64 %b, i64 %clin)
151    ret i64 %shld
152}
153
154define i16 @shld16mri8(ptr %ptr, i16 noundef %b) {
155; CHECK-LABEL: shld16mri8:
156; CHECK:       # %bb.0: # %entry
157; CHECK-NEXT:    shldw $12, %si, (%rdi), %ax
158; CHECK-NEXT:    retq
159entry:
160    %a = load i16, ptr %ptr
161    %shld = call i16 @llvm.fshl.i16(i16 %a, i16 %b, i16 12)
162    ret i16 %shld
163}
164
165define i32 @shld32mri8(ptr %ptr, i32 noundef %b) {
166; CHECK-LABEL: shld32mri8:
167; CHECK:       # %bb.0: # %entry
168; CHECK-NEXT:    shldl $12, %esi, (%rdi), %eax
169; CHECK-NEXT:    retq
170entry:
171    %a = load i32, ptr %ptr
172    %shld = call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 12)
173    ret i32 %shld
174}
175
176define i64 @shld64mri8(ptr %ptr, i64 noundef %b) {
177; CHECK-LABEL: shld64mri8:
178; CHECK:       # %bb.0: # %entry
179; CHECK-NEXT:    shldq $12, %rsi, (%rdi), %rax
180; CHECK-NEXT:    retq
181entry:
182    %a = load i64, ptr %ptr
183    %shld = call i64 @llvm.fshl.i64(i64 %a, i64 %b, i64 12)
184    ret i64 %shld
185}
186
187define void @shld16mrcl_legacy(ptr %ptr, i16 noundef %b, i8 %cl) {
188; CHECK-LABEL: shld16mrcl_legacy:
189; CHECK:       # %bb.0: # %entry
190; CHECK-NEXT:    andb $15, %dl, %cl
191; CHECK-NEXT:    shldw %cl, %si, (%rdi)
192; CHECK-NEXT:    retq
193entry:
194    %a = load i16, ptr %ptr
195    %clin = sext i8 %cl to i16
196    %shld = call i16 @llvm.fshl.i16(i16 %a, i16 %b, i16 %clin)
197    store i16 %shld, ptr %ptr
198    ret void
199}
200
201define void @shld32mrcl_legacy(ptr %ptr, i32 noundef %b, i8 %cl) {
202; CHECK-LABEL: shld32mrcl_legacy:
203; CHECK:       # %bb.0: # %entry
204; CHECK-NEXT:    movl %edx, %ecx
205; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
206; CHECK-NEXT:    shldl %cl, %esi, (%rdi)
207; CHECK-NEXT:    retq
208entry:
209    %a = load i32, ptr %ptr
210    %clin = sext i8 %cl to i32
211    %shld = call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 %clin)
212    store i32 %shld, ptr %ptr
213    ret void
214}
215
216define void @shld64mrcl_legacy(ptr %ptr, i64 noundef %b, i8 %cl) {
217; CHECK-LABEL: shld64mrcl_legacy:
218; CHECK:       # %bb.0: # %entry
219; CHECK-NEXT:    movl %edx, %ecx
220; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
221; CHECK-NEXT:    shldq %cl, %rsi, (%rdi)
222; CHECK-NEXT:    retq
223entry:
224    %a = load i64, ptr %ptr
225    %clin = sext i8 %cl to i64
226    %shld = call i64 @llvm.fshl.i64(i64 %a, i64 %b, i64 %clin)
227    store i64 %shld, ptr %ptr
228    ret void
229}
230
231define void @shld16mri8_legacy(ptr %ptr, i16 noundef %b) {
232; CHECK-LABEL: shld16mri8_legacy:
233; CHECK:       # %bb.0: # %entry
234; CHECK-NEXT:    shldw $12, %si, (%rdi)
235; CHECK-NEXT:    retq
236entry:
237    %a = load i16, ptr %ptr
238    %shld = call i16 @llvm.fshl.i16(i16 %a, i16 %b, i16 12)
239    store i16 %shld, ptr %ptr
240    ret void
241}
242
243define void @shld32mri8_legacy(ptr %ptr, i32 noundef %b) {
244; CHECK-LABEL: shld32mri8_legacy:
245; CHECK:       # %bb.0: # %entry
246; CHECK-NEXT:    shldl $12, %esi, (%rdi)
247; CHECK-NEXT:    retq
248entry:
249    %a = load i32, ptr %ptr
250    %shld = call i32 @llvm.fshl.i32(i32 %a, i32 %b, i32 12)
251    store i32 %shld, ptr %ptr
252    ret void
253}
254
255define void @shld64mri8_legacy(ptr %ptr, i64 noundef %b) {
256; CHECK-LABEL: shld64mri8_legacy:
257; CHECK:       # %bb.0: # %entry
258; CHECK-NEXT:    shldq $12, %rsi, (%rdi)
259; CHECK-NEXT:    retq
260entry:
261    %a = load i64, ptr %ptr
262    %shld = call i64 @llvm.fshl.i64(i64 %a, i64 %b, i64 12)
263    store i64 %shld, ptr %ptr
264    ret void
265}
266