xref: /llvm-project/llvm/test/CodeGen/X86/apx/sbb.ll (revision 20683de70e43fa73536ac1e8ce4082604048d040) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s
3
4define i8 @sbb8rr(i8 %a, i8 %b, i8 %x, i8 %y) nounwind {
5; CHECK-LABEL: sbb8rr:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    cmpb %dl, %cl # encoding: [0x38,0xd1]
8; CHECK-NEXT:    sbbb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x18,0xf7]
9; CHECK-NEXT:    retq # encoding: [0xc3]
10  %s = sub i8 %a, %b
11  %k = icmp ugt i8 %x, %y
12  %z = zext i1 %k to i8
13  %r = sub i8 %s, %z
14  ret i8 %r
15}
16
17define i16 @sbb16rr(i16 %a, i16 %b, i16 %x, i16 %y) nounwind {
18; CHECK-LABEL: sbb16rr:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
21; CHECK-NEXT:    sbbw %si, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x19,0xf7]
22; CHECK-NEXT:    retq # encoding: [0xc3]
23  %s = sub i16 %a, %b
24  %k = icmp ugt i16 %x, %y
25  %z = zext i1 %k to i16
26  %r = sub i16 %s, %z
27  ret i16 %r
28}
29
30define i32 @sbb32rr(i32 %a, i32 %b, i32 %x, i32 %y) nounwind {
31; CHECK-LABEL: sbb32rr:
32; CHECK:       # %bb.0:
33; CHECK-NEXT:    cmpl %edx, %ecx # encoding: [0x39,0xd1]
34; CHECK-NEXT:    sbbl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x19,0xf7]
35; CHECK-NEXT:    retq # encoding: [0xc3]
36  %s = sub i32 %a, %b
37  %k = icmp ugt i32 %x, %y
38  %z = zext i1 %k to i32
39  %r = sub i32 %s, %z
40  ret i32 %r
41}
42
43define i64 @sbb64rr(i64 %a, i64 %b, i64 %x, i64 %y) nounwind {
44; CHECK-LABEL: sbb64rr:
45; CHECK:       # %bb.0:
46; CHECK-NEXT:    cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
47; CHECK-NEXT:    sbbq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x19,0xf7]
48; CHECK-NEXT:    retq # encoding: [0xc3]
49  %s = sub i64 %a, %b
50  %k = icmp ugt i64 %x, %y
51  %z = zext i1 %k to i64
52  %r = sub i64 %s, %z
53  ret i64 %r
54}
55
56define i8 @sbb8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
57; CHECK-LABEL: sbb8rm:
58; CHECK:       # %bb.0:
59; CHECK-NEXT:    cmpb %dl, %cl # encoding: [0x38,0xd1]
60; CHECK-NEXT:    sbbb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x1a,0x3e]
61; CHECK-NEXT:    retq # encoding: [0xc3]
62  %b = load i8, ptr %ptr
63  %s = sub i8 %a, %b
64  %k = icmp ugt i8 %x, %y
65  %z = zext i1 %k to i8
66  %r = sub i8 %s, %z
67  ret i8 %r
68}
69
70define i16 @sbb16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
71; CHECK-LABEL: sbb16rm:
72; CHECK:       # %bb.0:
73; CHECK-NEXT:    cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
74; CHECK-NEXT:    sbbw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x1b,0x3e]
75; CHECK-NEXT:    retq # encoding: [0xc3]
76  %b = load i16, ptr %ptr
77  %s = sub i16 %a, %b
78  %k = icmp ugt i16 %x, %y
79  %z = zext i1 %k to i16
80  %r = sub i16 %s, %z
81  ret i16 %r
82}
83
84define i32 @sbb32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
85; CHECK-LABEL: sbb32rm:
86; CHECK:       # %bb.0:
87; CHECK-NEXT:    cmpl %edx, %ecx # encoding: [0x39,0xd1]
88; CHECK-NEXT:    sbbl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x1b,0x3e]
89; CHECK-NEXT:    retq # encoding: [0xc3]
90  %b = load i32, ptr %ptr
91  %s = sub i32 %a, %b
92  %k = icmp ugt i32 %x, %y
93  %z = zext i1 %k to i32
94  %r = sub i32 %s, %z
95  ret i32 %r
96}
97
98define i64 @sbb64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
99; CHECK-LABEL: sbb64rm:
100; CHECK:       # %bb.0:
101; CHECK-NEXT:    cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
102; CHECK-NEXT:    sbbq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x1b,0x3e]
103; CHECK-NEXT:    retq # encoding: [0xc3]
104  %b = load i64, ptr %ptr
105  %s = sub i64 %a, %b
106  %k = icmp ugt i64 %x, %y
107  %z = zext i1 %k to i64
108  %r = sub i64 %s, %z
109  ret i64 %r
110}
111
112define i16 @sbb16ri8(i16 %a, i16 %x, i16 %y) nounwind {
113; CHECK-LABEL: sbb16ri8:
114; CHECK:       # %bb.0:
115; CHECK-NEXT:    cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
116; CHECK-NEXT:    sbbw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0xdf,0x00]
117; CHECK-NEXT:    addw $-123, %ax # EVEX TO LEGACY Compression encoding: [0x66,0x83,0xc0,0x85]
118; CHECK-NEXT:    retq # encoding: [0xc3]
119  %s = sub i16 %a, 123
120  %k = icmp ugt i16 %x, %y
121  %z = zext i1 %k to i16
122  %r = sub i16 %s, %z
123  ret i16 %r
124}
125
126define i32 @sbb32ri8(i32 %a, i32 %x, i32 %y) nounwind {
127; CHECK-LABEL: sbb32ri8:
128; CHECK:       # %bb.0:
129; CHECK-NEXT:    cmpl %esi, %edx # encoding: [0x39,0xf2]
130; CHECK-NEXT:    sbbl $0, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xdf,0x00]
131; CHECK-NEXT:    addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85]
132; CHECK-NEXT:    retq # encoding: [0xc3]
133  %s = sub i32 %a, 123
134  %k = icmp ugt i32 %x, %y
135  %z = zext i1 %k to i32
136  %r = sub i32 %s, %z
137  ret i32 %r
138}
139
140define i64 @sbb64ri8(i64 %a, i64 %x, i64 %y) nounwind {
141; CHECK-LABEL: sbb64ri8:
142; CHECK:       # %bb.0:
143; CHECK-NEXT:    cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
144; CHECK-NEXT:    sbbq $0, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xdf,0x00]
145; CHECK-NEXT:    addq $-123, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x83,0xc0,0x85]
146; CHECK-NEXT:    retq # encoding: [0xc3]
147  %s = sub i64 %a, 123
148  %k = icmp ugt i64 %x, %y
149  %z = zext i1 %k to i64
150  %r = sub i64 %s, %z
151  ret i64 %r
152}
153
154define i8 @sbb8ri(i8 %a, i8 %x, i8 %y) nounwind {
155; CHECK-LABEL: sbb8ri:
156; CHECK:       # %bb.0:
157; CHECK-NEXT:    cmpb %sil, %dl # encoding: [0x40,0x38,0xf2]
158; CHECK-NEXT:    sbbb $0, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xdf,0x00]
159; CHECK-NEXT:    addb $-123, %al # EVEX TO LEGACY Compression encoding: [0x04,0x85]
160; CHECK-NEXT:    retq # encoding: [0xc3]
161  %s = sub i8 %a, 123
162  %k = icmp ugt i8 %x, %y
163  %z = zext i1 %k to i8
164  %r = sub i8 %s, %z
165  ret i8 %r
166}
167
168define i16 @sbb16ri(i16 %a, i16 %x, i16 %y) nounwind {
169; CHECK-LABEL: sbb16ri:
170; CHECK:       # %bb.0:
171; CHECK-NEXT:    cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
172; CHECK-NEXT:    sbbw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0xdf,0x00]
173; CHECK-NEXT:    addw $-1234, %ax # EVEX TO LEGACY Compression encoding: [0x66,0x05,0x2e,0xfb]
174; CHECK-NEXT:    # imm = 0xFB2E
175; CHECK-NEXT:    retq # encoding: [0xc3]
176  %s = sub i16 %a, 1234
177  %k = icmp ugt i16 %x, %y
178  %z = zext i1 %k to i16
179  %r = sub i16 %s, %z
180  ret i16 %r
181}
182
183define i32 @sbb32ri(i32 %a, i32 %x, i32 %y) nounwind {
184; CHECK-LABEL: sbb32ri:
185; CHECK:       # %bb.0:
186; CHECK-NEXT:    cmpl %esi, %edx # encoding: [0x39,0xf2]
187; CHECK-NEXT:    sbbl $0, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xdf,0x00]
188; CHECK-NEXT:    addl $-123456, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xc0,0x1d,0xfe,0xff]
189; CHECK-NEXT:    # imm = 0xFFFE1DC0
190; CHECK-NEXT:    retq # encoding: [0xc3]
191  %s = sub i32 %a, 123456
192  %k = icmp ugt i32 %x, %y
193  %z = zext i1 %k to i32
194  %r = sub i32 %s, %z
195  ret i32 %r
196}
197
198define i64 @sbb64ri(i64 %a, i64 %x, i64 %y) nounwind {
199; CHECK-LABEL: sbb64ri:
200; CHECK:       # %bb.0:
201; CHECK-NEXT:    cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
202; CHECK-NEXT:    sbbq $0, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xdf,0x00]
203; CHECK-NEXT:    addq $-123456, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x05,0xc0,0x1d,0xfe,0xff]
204; CHECK-NEXT:    # imm = 0xFFFE1DC0
205; CHECK-NEXT:    retq # encoding: [0xc3]
206  %s = sub i64 %a, 123456
207  %k = icmp ugt i64 %x, %y
208  %z = zext i1 %k to i64
209  %r = sub i64 %s, %z
210  ret i64 %r
211}
212
213define i8 @sbb8mr(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
214; CHECK-LABEL: sbb8mr:
215; CHECK:       # %bb.0:
216; CHECK-NEXT:    cmpb %dl, %cl # encoding: [0x38,0xd1]
217; CHECK-NEXT:    sbbb %dil, (%rsi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x18,0x3e]
218; CHECK-NEXT:    retq # encoding: [0xc3]
219  %b = load i8, ptr %ptr
220  %s = sub i8 %b, %a
221  %k = icmp ugt i8 %x, %y
222  %z = zext i1 %k to i8
223  %r = sub i8 %s, %z
224  ret i8 %r
225}
226
227define i16 @sbb16mr(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
228; CHECK-LABEL: sbb16mr:
229; CHECK:       # %bb.0:
230; CHECK-NEXT:    cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
231; CHECK-NEXT:    sbbw %di, (%rsi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x19,0x3e]
232; CHECK-NEXT:    retq # encoding: [0xc3]
233  %b = load i16, ptr %ptr
234  %s = sub i16 %b, %a
235  %k = icmp ugt i16 %x, %y
236  %z = zext i1 %k to i16
237  %r = sub i16 %s, %z
238  ret i16 %r
239}
240
241define i32 @sbb32mr(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
242; CHECK-LABEL: sbb32mr:
243; CHECK:       # %bb.0:
244; CHECK-NEXT:    cmpl %edx, %ecx # encoding: [0x39,0xd1]
245; CHECK-NEXT:    sbbl %edi, (%rsi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x19,0x3e]
246; CHECK-NEXT:    retq # encoding: [0xc3]
247  %b = load i32, ptr %ptr
248  %s = sub i32 %b, %a
249  %k = icmp ugt i32 %x, %y
250  %z = zext i1 %k to i32
251  %r = sub i32 %s, %z
252  ret i32 %r
253}
254
255define i64 @sbb64mr(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
256; CHECK-LABEL: sbb64mr:
257; CHECK:       # %bb.0:
258; CHECK-NEXT:    cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
259; CHECK-NEXT:    sbbq %rdi, (%rsi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x19,0x3e]
260; CHECK-NEXT:    retq # encoding: [0xc3]
261  %b = load i64, ptr %ptr
262  %s = sub i64 %b, %a
263  %k = icmp ugt i64 %x, %y
264  %z = zext i1 %k to i64
265  %r = sub i64 %s, %z
266  ret i64 %r
267}
268
269define i16 @sbb16mi8(ptr %ptr, i16 %x, i16 %y) nounwind {
270; CHECK-LABEL: sbb16mi8:
271; CHECK:       # %bb.0:
272; CHECK-NEXT:    cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
273; CHECK-NEXT:    sbbw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0x1f,0x00]
274; CHECK-NEXT:    addw $-123, %ax # EVEX TO LEGACY Compression encoding: [0x66,0x83,0xc0,0x85]
275; CHECK-NEXT:    retq # encoding: [0xc3]
276  %a = load i16, ptr %ptr
277  %s = sub i16 %a, 123
278  %k = icmp ugt i16 %x, %y
279  %z = zext i1 %k to i16
280  %r = sub i16 %s, %z
281  ret i16 %r
282}
283
284define i32 @sbb32mi8(ptr %ptr, i32 %x, i32 %y) nounwind {
285; CHECK-LABEL: sbb32mi8:
286; CHECK:       # %bb.0:
287; CHECK-NEXT:    cmpl %esi, %edx # encoding: [0x39,0xf2]
288; CHECK-NEXT:    sbbl $0, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x1f,0x00]
289; CHECK-NEXT:    addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85]
290; CHECK-NEXT:    retq # encoding: [0xc3]
291  %a = load i32, ptr %ptr
292  %s = sub i32 %a, 123
293  %k = icmp ugt i32 %x, %y
294  %z = zext i1 %k to i32
295  %r = sub i32 %s, %z
296  ret i32 %r
297}
298
299define i64 @sbb64mi8(ptr %ptr, i64 %x, i64 %y) nounwind {
300; CHECK-LABEL: sbb64mi8:
301; CHECK:       # %bb.0:
302; CHECK-NEXT:    cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
303; CHECK-NEXT:    sbbq $0, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x1f,0x00]
304; CHECK-NEXT:    addq $-123, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x83,0xc0,0x85]
305; CHECK-NEXT:    retq # encoding: [0xc3]
306  %a = load i64, ptr %ptr
307  %s = sub i64 %a, 123
308  %k = icmp ugt i64 %x, %y
309  %z = zext i1 %k to i64
310  %r = sub i64 %s, %z
311  ret i64 %r
312}
313
314define i8 @sbb8mi(ptr %ptr, i8 %x, i8 %y) nounwind {
315; CHECK-LABEL: sbb8mi:
316; CHECK:       # %bb.0:
317; CHECK-NEXT:    cmpb %sil, %dl # encoding: [0x40,0x38,0xf2]
318; CHECK-NEXT:    sbbb $0, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x1f,0x00]
319; CHECK-NEXT:    addb $-123, %al # EVEX TO LEGACY Compression encoding: [0x04,0x85]
320; CHECK-NEXT:    retq # encoding: [0xc3]
321  %a = load i8, ptr %ptr
322  %s = sub i8 %a, 123
323  %k = icmp ugt i8 %x, %y
324  %z = zext i1 %k to i8
325  %r = sub i8 %s, %z
326  ret i8 %r
327}
328
329define i16 @sbb16mi(ptr %ptr, i16 %x, i16 %y) nounwind {
330; CHECK-LABEL: sbb16mi:
331; CHECK:       # %bb.0:
332; CHECK-NEXT:    cmpw %si, %dx # encoding: [0x66,0x39,0xf2]
333; CHECK-NEXT:    sbbw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0x1f,0x00]
334; CHECK-NEXT:    addw $-1234, %ax # EVEX TO LEGACY Compression encoding: [0x66,0x05,0x2e,0xfb]
335; CHECK-NEXT:    # imm = 0xFB2E
336; CHECK-NEXT:    retq # encoding: [0xc3]
337  %a = load i16, ptr %ptr
338  %s = sub i16 %a, 1234
339  %k = icmp ugt i16 %x, %y
340  %z = zext i1 %k to i16
341  %r = sub i16 %s, %z
342  ret i16 %r
343}
344
345define i32 @sbb32mi(ptr %ptr, i32 %x, i32 %y) nounwind {
346; CHECK-LABEL: sbb32mi:
347; CHECK:       # %bb.0:
348; CHECK-NEXT:    cmpl %esi, %edx # encoding: [0x39,0xf2]
349; CHECK-NEXT:    sbbl $0, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x1f,0x00]
350; CHECK-NEXT:    addl $-123456, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xc0,0x1d,0xfe,0xff]
351; CHECK-NEXT:    # imm = 0xFFFE1DC0
352; CHECK-NEXT:    retq # encoding: [0xc3]
353  %a = load i32, ptr %ptr
354  %s = sub i32 %a, 123456
355  %k = icmp ugt i32 %x, %y
356  %z = zext i1 %k to i32
357  %r = sub i32 %s, %z
358  ret i32 %r
359}
360
361define i64 @sbb64mi(ptr %ptr, i64 %x, i64 %y) nounwind {
362; CHECK-LABEL: sbb64mi:
363; CHECK:       # %bb.0:
364; CHECK-NEXT:    cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2]
365; CHECK-NEXT:    sbbq $0, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x1f,0x00]
366; CHECK-NEXT:    addq $-123456, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x05,0xc0,0x1d,0xfe,0xff]
367; CHECK-NEXT:    # imm = 0xFFFE1DC0
368; CHECK-NEXT:    retq # encoding: [0xc3]
369  %a = load i64, ptr %ptr
370  %s = sub i64 %a, 123456
371  %k = icmp ugt i64 %x, %y
372  %z = zext i1 %k to i64
373  %r = sub i64 %s, %z
374  ret i64 %r
375}
376
377define void @sbb8mr_legacy(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
378; CHECK-LABEL: sbb8mr_legacy:
379; CHECK:       # %bb.0:
380; CHECK-NEXT:    cmpb %dl, %cl # encoding: [0x38,0xd1]
381; CHECK-NEXT:    sbbb %dil, (%rsi) # encoding: [0x40,0x18,0x3e]
382; CHECK-NEXT:    retq # encoding: [0xc3]
383  %b = load i8, ptr %ptr
384  %s = sub i8 %b, %a
385  %k = icmp ugt i8 %x, %y
386  %z = zext i1 %k to i8
387  %r = sub i8 %s, %z
388  store i8 %r, ptr %ptr
389  ret void
390}
391
392define void @sbb16mr_legacy(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
393; CHECK-LABEL: sbb16mr_legacy:
394; CHECK:       # %bb.0:
395; CHECK-NEXT:    cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
396; CHECK-NEXT:    sbbw %di, (%rsi) # encoding: [0x66,0x19,0x3e]
397; CHECK-NEXT:    retq # encoding: [0xc3]
398  %b = load i16, ptr %ptr
399  %s = sub i16 %b, %a
400  %k = icmp ugt i16 %x, %y
401  %z = zext i1 %k to i16
402  %r = sub i16 %s, %z
403  store i16 %r, ptr %ptr
404  ret void
405}
406
407define void @sbb32mr_legacy(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
408; CHECK-LABEL: sbb32mr_legacy:
409; CHECK:       # %bb.0:
410; CHECK-NEXT:    cmpl %edx, %ecx # encoding: [0x39,0xd1]
411; CHECK-NEXT:    sbbl %edi, (%rsi) # encoding: [0x19,0x3e]
412; CHECK-NEXT:    retq # encoding: [0xc3]
413  %b = load i32, ptr %ptr
414  %s = sub i32 %b, %a
415  %k = icmp ugt i32 %x, %y
416  %z = zext i1 %k to i32
417  %r = sub i32 %s, %z
418  store i32 %r, ptr %ptr
419  ret void
420}
421
422define void @sbb64mr_legacy(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
423; CHECK-LABEL: sbb64mr_legacy:
424; CHECK:       # %bb.0:
425; CHECK-NEXT:    cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
426; CHECK-NEXT:    sbbq %rdi, (%rsi) # encoding: [0x48,0x19,0x3e]
427; CHECK-NEXT:    retq # encoding: [0xc3]
428  %b = load i64, ptr %ptr
429  %s = sub i64 %b, %a
430  %k = icmp ugt i64 %x, %y
431  %z = zext i1 %k to i64
432  %r = sub i64 %s, %z
433  store i64 %r, ptr %ptr
434  ret void
435}
436