1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s 3 4define i8 @sar8m1(ptr %ptr) { 5; CHECK-LABEL: sar8m1: 6; CHECK: # %bb.0: # %entry 7; CHECK-NEXT: sarb (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xd0,0x3f] 8; CHECK-NEXT: retq # encoding: [0xc3] 9entry: 10 %a = load i8, ptr %ptr 11 %sar = ashr i8 %a, 1 12 ret i8 %sar 13} 14 15define i16 @sar16m1(ptr %ptr) { 16; CHECK-LABEL: sar16m1: 17; CHECK: # %bb.0: # %entry 18; CHECK-NEXT: sarw (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0xd1,0x3f] 19; CHECK-NEXT: retq # encoding: [0xc3] 20entry: 21 %a = load i16, ptr %ptr 22 %sar = ashr i16 %a, 1 23 ret i16 %sar 24} 25 26define i32 @sar32m1(ptr %ptr) { 27; CHECK-LABEL: sar32m1: 28; CHECK: # %bb.0: # %entry 29; CHECK-NEXT: sarl (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd1,0x3f] 30; CHECK-NEXT: retq # encoding: [0xc3] 31entry: 32 %a = load i32, ptr %ptr 33 %sar = ashr i32 %a, 1 34 ret i32 %sar 35} 36 37define i64 @sar64m1(ptr %ptr) { 38; CHECK-LABEL: sar64m1: 39; CHECK: # %bb.0: # %entry 40; CHECK-NEXT: sarq (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd1,0x3f] 41; CHECK-NEXT: retq # encoding: [0xc3] 42entry: 43 %a = load i64, ptr %ptr 44 %sar = ashr i64 %a, 1 45 ret i64 %sar 46} 47 48define i8 @sar8mcl(ptr %ptr, i8 %cl) { 49; CHECK-LABEL: sar8mcl: 50; CHECK: # %bb.0: # %entry 51; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 52; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 53; CHECK-NEXT: sarb %cl, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xd2,0x3f] 54; CHECK-NEXT: retq # encoding: [0xc3] 55entry: 56 %a = load i8, ptr %ptr 57 %sar = ashr i8 %a, %cl 58 ret i8 %sar 59} 60 61define i8 @sar8mcl_mask(ptr %ptr, i8 %cl) { 62; CHECK-LABEL: sar8mcl_mask: 63; CHECK: # %bb.0: # %entry 64; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 65; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 66; CHECK-NEXT: sarb %cl, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xd2,0x3f] 67; CHECK-NEXT: retq # encoding: [0xc3] 68entry: 69 %a = load i8, ptr %ptr 70 %shamt = and i8 %cl, 31 71 %sar = ashr i8 %a, %shamt 72 ret i8 %sar 73} 74 75define i16 @sar16mcl(ptr %ptr, i16 %cl) { 76; CHECK-LABEL: sar16mcl: 77; CHECK: # %bb.0: # %entry 78; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 79; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 80; CHECK-NEXT: sarw %cl, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0xd3,0x3f] 81; CHECK-NEXT: retq # encoding: [0xc3] 82entry: 83 %a = load i16, ptr %ptr 84 %sar = ashr i16 %a, %cl 85 ret i16 %sar 86} 87 88define i16 @sar16mcl_mask(ptr %ptr, i16 %cl) { 89; CHECK-LABEL: sar16mcl_mask: 90; CHECK: # %bb.0: # %entry 91; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 92; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 93; CHECK-NEXT: sarw %cl, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0xd3,0x3f] 94; CHECK-NEXT: retq # encoding: [0xc3] 95entry: 96 %a = load i16, ptr %ptr 97 %shamt = and i16 %cl, 31 98 %sar = ashr i16 %a, %shamt 99 ret i16 %sar 100} 101 102define i32 @sar32mcl(ptr %ptr, i32 %cl) { 103; CHECK-LABEL: sar32mcl: 104; CHECK: # %bb.0: # %entry 105; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 106; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 107; CHECK-NEXT: sarl %cl, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0x3f] 108; CHECK-NEXT: retq # encoding: [0xc3] 109entry: 110 %a = load i32, ptr %ptr 111 %sar = ashr i32 %a, %cl 112 ret i32 %sar 113} 114 115define i32 @sar32mcl_mask(ptr %ptr, i32 %cl) { 116; CHECK-LABEL: sar32mcl_mask: 117; CHECK: # %bb.0: # %entry 118; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 119; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 120; CHECK-NEXT: sarl %cl, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0x3f] 121; CHECK-NEXT: retq # encoding: [0xc3] 122entry: 123 %a = load i32, ptr %ptr 124 %shamt = and i32 %cl, 31 125 %sar = ashr i32 %a, %shamt 126 ret i32 %sar 127} 128 129define i64 @sar64mcl(ptr %ptr, i64 %cl) { 130; CHECK-LABEL: sar64mcl: 131; CHECK: # %bb.0: # %entry 132; CHECK-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1] 133; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx 134; CHECK-NEXT: sarq %cl, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd3,0x3f] 135; CHECK-NEXT: retq # encoding: [0xc3] 136entry: 137 %a = load i64, ptr %ptr 138 %sar = ashr i64 %a, %cl 139 ret i64 %sar 140} 141 142define i64 @sar64mcl_mask(ptr %ptr, i64 %cl) { 143; CHECK-LABEL: sar64mcl_mask: 144; CHECK: # %bb.0: # %entry 145; CHECK-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1] 146; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx 147; CHECK-NEXT: sarq %cl, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd3,0x3f] 148; CHECK-NEXT: retq # encoding: [0xc3] 149entry: 150 %a = load i64, ptr %ptr 151 %shamt = and i64 %cl, 63 152 %sar = ashr i64 %a, %shamt 153 ret i64 %sar 154} 155 156define i8 @sar8mi(ptr %ptr) { 157; CHECK-LABEL: sar8mi: 158; CHECK: # %bb.0: # %entry 159; CHECK-NEXT: sarb $4, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xc0,0x3f,0x04] 160; CHECK-NEXT: retq # encoding: [0xc3] 161entry: 162 %a = load i8, ptr %ptr 163 %sar = ashr i8 %a, 4 164 ret i8 %sar 165} 166 167define i16 @sar16mi(ptr %ptr) { 168; CHECK-LABEL: sar16mi: 169; CHECK: # %bb.0: # %entry 170; CHECK-NEXT: sarw $4, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0xc1,0x3f,0x04] 171; CHECK-NEXT: retq # encoding: [0xc3] 172entry: 173 %a = load i16, ptr %ptr 174 %sar = ashr i16 %a, 4 175 ret i16 %sar 176} 177 178define i32 @sar32mi(ptr %ptr) { 179; CHECK-LABEL: sar32mi: 180; CHECK: # %bb.0: # %entry 181; CHECK-NEXT: sarl $4, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0xc1,0x3f,0x04] 182; CHECK-NEXT: retq # encoding: [0xc3] 183entry: 184 %a = load i32, ptr %ptr 185 %sar = ashr i32 %a, 4 186 ret i32 %sar 187} 188 189define i64 @sar64mi(ptr %ptr) { 190; CHECK-LABEL: sar64mi: 191; CHECK: # %bb.0: # %entry 192; CHECK-NEXT: sarq $4, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0xc1,0x3f,0x04] 193; CHECK-NEXT: retq # encoding: [0xc3] 194entry: 195 %a = load i64, ptr %ptr 196 %sar = ashr i64 %a, 4 197 ret i64 %sar 198} 199 200define i8 @sar8r1(i8 noundef %a) { 201; CHECK-LABEL: sar8r1: 202; CHECK: # %bb.0: # %entry 203; CHECK-NEXT: sarb %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xd0,0xff] 204; CHECK-NEXT: retq # encoding: [0xc3] 205entry: 206 %sar = ashr i8 %a, 1 207 ret i8 %sar 208} 209 210define i16 @sar16r1(i16 noundef %a) { 211; CHECK-LABEL: sar16r1: 212; CHECK: # %bb.0: # %entry 213; CHECK-NEXT: sarw %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0xd1,0xff] 214; CHECK-NEXT: retq # encoding: [0xc3] 215entry: 216 %sar = ashr i16 %a, 1 217 ret i16 %sar 218} 219 220define i32 @sar32r1(i32 noundef %a) { 221; CHECK-LABEL: sar32r1: 222; CHECK: # %bb.0: # %entry 223; CHECK-NEXT: sarl %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd1,0xff] 224; CHECK-NEXT: retq # encoding: [0xc3] 225entry: 226 %sar = ashr i32 %a, 1 227 ret i32 %sar 228} 229 230define i64 @sar64r1(i64 noundef %a) { 231; CHECK-LABEL: sar64r1: 232; CHECK: # %bb.0: # %entry 233; CHECK-NEXT: sarq %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd1,0xff] 234; CHECK-NEXT: retq # encoding: [0xc3] 235entry: 236 %sar = ashr i64 %a, 1 237 ret i64 %sar 238} 239 240define i8 @sar8rcl(i8 noundef %a, i8 %cl) { 241; CHECK-LABEL: sar8rcl: 242; CHECK: # %bb.0: # %entry 243; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 244; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 245; CHECK-NEXT: sarb %cl, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xd2,0xff] 246; CHECK-NEXT: retq # encoding: [0xc3] 247entry: 248 %sar = ashr i8 %a, %cl 249 ret i8 %sar 250} 251 252define i8 @sar8rcl_mask(i8 noundef %a, i8 %cl) { 253; CHECK-LABEL: sar8rcl_mask: 254; CHECK: # %bb.0: # %entry 255; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 256; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 257; CHECK-NEXT: sarb %cl, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xd2,0xff] 258; CHECK-NEXT: retq # encoding: [0xc3] 259entry: 260 %shamt = and i8 %cl, 31 261 %sar = ashr i8 %a, %shamt 262 ret i8 %sar 263} 264 265define i16 @sar16rcl(i16 noundef %a, i16 %cl) { 266; CHECK-LABEL: sar16rcl: 267; CHECK: # %bb.0: # %entry 268; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 269; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 270; CHECK-NEXT: sarw %cl, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0xd3,0xff] 271; CHECK-NEXT: retq # encoding: [0xc3] 272entry: 273 %sar = ashr i16 %a, %cl 274 ret i16 %sar 275} 276 277define i16 @sar16rcl_mask(i16 noundef %a, i16 %cl) { 278; CHECK-LABEL: sar16rcl_mask: 279; CHECK: # %bb.0: # %entry 280; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 281; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 282; CHECK-NEXT: sarw %cl, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0xd3,0xff] 283; CHECK-NEXT: retq # encoding: [0xc3] 284entry: 285 %shamt = and i16 %cl, 31 286 %sar = ashr i16 %a, %shamt 287 ret i16 %sar 288} 289 290define i32 @sar32rcl(i32 noundef %a, i32 %cl) { 291; CHECK-LABEL: sar32rcl: 292; CHECK: # %bb.0: # %entry 293; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 294; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 295; CHECK-NEXT: sarl %cl, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0xff] 296; CHECK-NEXT: retq # encoding: [0xc3] 297entry: 298 %sar = ashr i32 %a, %cl 299 ret i32 %sar 300} 301 302define i32 @sar32rcl_mask(i32 noundef %a, i32 %cl) { 303; CHECK-LABEL: sar32rcl_mask: 304; CHECK: # %bb.0: # %entry 305; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 306; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 307; CHECK-NEXT: sarl %cl, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0xff] 308; CHECK-NEXT: retq # encoding: [0xc3] 309entry: 310 %shamt = and i32 %cl, 31 311 %sar = ashr i32 %a, %shamt 312 ret i32 %sar 313} 314 315define i64 @sar64rcl(i64 noundef %a, i64 %cl) { 316; CHECK-LABEL: sar64rcl: 317; CHECK: # %bb.0: # %entry 318; CHECK-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1] 319; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx 320; CHECK-NEXT: sarq %cl, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd3,0xff] 321; CHECK-NEXT: retq # encoding: [0xc3] 322entry: 323 %sar = ashr i64 %a, %cl 324 ret i64 %sar 325} 326 327define i64 @sar64rcl_mask(i64 noundef %a, i64 %cl) { 328; CHECK-LABEL: sar64rcl_mask: 329; CHECK: # %bb.0: # %entry 330; CHECK-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1] 331; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx 332; CHECK-NEXT: sarq %cl, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd3,0xff] 333; CHECK-NEXT: retq # encoding: [0xc3] 334entry: 335 %shamt = and i64 %cl, 63 336 %sar = ashr i64 %a, %shamt 337 ret i64 %sar 338} 339 340define i8 @sar8ri(i8 noundef %a) { 341; CHECK-LABEL: sar8ri: 342; CHECK: # %bb.0: # %entry 343; CHECK-NEXT: sarb $4, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xc0,0xff,0x04] 344; CHECK-NEXT: retq # encoding: [0xc3] 345entry: 346 %sar = ashr i8 %a, 4 347 ret i8 %sar 348} 349 350define i16 @sar16ri(i16 noundef %a) { 351; CHECK-LABEL: sar16ri: 352; CHECK: # %bb.0: # %entry 353; CHECK-NEXT: sarw $4, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0xc1,0xff,0x04] 354; CHECK-NEXT: retq # encoding: [0xc3] 355entry: 356 %sar = ashr i16 %a, 4 357 ret i16 %sar 358} 359 360define i32 @sar32ri(i32 noundef %a) { 361; CHECK-LABEL: sar32ri: 362; CHECK: # %bb.0: # %entry 363; CHECK-NEXT: sarl $4, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xc1,0xff,0x04] 364; CHECK-NEXT: retq # encoding: [0xc3] 365entry: 366 %sar = ashr i32 %a, 4 367 ret i32 %sar 368} 369 370define i64 @sar64ri(i64 noundef %a) { 371; CHECK-LABEL: sar64ri: 372; CHECK: # %bb.0: # %entry 373; CHECK-NEXT: sarq $4, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0xc1,0xff,0x04] 374; CHECK-NEXT: retq # encoding: [0xc3] 375entry: 376 %sar = ashr i64 %a, 4 377 ret i64 %sar 378} 379 380define void @sar8m1_legacy(ptr %ptr) { 381; CHECK-LABEL: sar8m1_legacy: 382; CHECK: # %bb.0: # %entry 383; CHECK-NEXT: sarb (%rdi) # encoding: [0xd0,0x3f] 384; CHECK-NEXT: retq # encoding: [0xc3] 385entry: 386 %a = load i8, ptr %ptr 387 %sar = ashr i8 %a, 1 388 store i8 %sar, ptr %ptr 389 ret void 390} 391 392define void @sar16m1_legacy(ptr %ptr) { 393; CHECK-LABEL: sar16m1_legacy: 394; CHECK: # %bb.0: # %entry 395; CHECK-NEXT: sarw (%rdi) # encoding: [0x66,0xd1,0x3f] 396; CHECK-NEXT: retq # encoding: [0xc3] 397entry: 398 %a = load i16, ptr %ptr 399 %sar = ashr i16 %a, 1 400 store i16 %sar, ptr %ptr 401 ret void 402} 403 404define void @sar32m1_legacy(ptr %ptr) { 405; CHECK-LABEL: sar32m1_legacy: 406; CHECK: # %bb.0: # %entry 407; CHECK-NEXT: sarl (%rdi) # encoding: [0xd1,0x3f] 408; CHECK-NEXT: retq # encoding: [0xc3] 409entry: 410 %a = load i32, ptr %ptr 411 %sar = ashr i32 %a, 1 412 store i32 %sar, ptr %ptr 413 ret void 414} 415 416define void @sar64m1_legacy(ptr %ptr) { 417; CHECK-LABEL: sar64m1_legacy: 418; CHECK: # %bb.0: # %entry 419; CHECK-NEXT: sarq (%rdi) # encoding: [0x48,0xd1,0x3f] 420; CHECK-NEXT: retq # encoding: [0xc3] 421entry: 422 %a = load i64, ptr %ptr 423 %sar = ashr i64 %a, 1 424 store i64 %sar, ptr %ptr 425 ret void 426} 427 428define void @sar8mcl_legacy(ptr %ptr, i8 %cl) { 429; CHECK-LABEL: sar8mcl_legacy: 430; CHECK: # %bb.0: # %entry 431; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 432; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 433; CHECK-NEXT: sarb %cl, (%rdi) # encoding: [0xd2,0x3f] 434; CHECK-NEXT: retq # encoding: [0xc3] 435entry: 436 %a = load i8, ptr %ptr 437 %sar = ashr i8 %a, %cl 438 store i8 %sar, ptr %ptr 439 ret void 440} 441 442define void @sar16mcl_legacy(ptr %ptr, i16 %cl) { 443; CHECK-LABEL: sar16mcl_legacy: 444; CHECK: # %bb.0: # %entry 445; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 446; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 447; CHECK-NEXT: sarw %cl, (%rdi) # encoding: [0x66,0xd3,0x3f] 448; CHECK-NEXT: retq # encoding: [0xc3] 449entry: 450 %a = load i16, ptr %ptr 451 %sar = ashr i16 %a, %cl 452 store i16 %sar, ptr %ptr 453 ret void 454} 455 456define void @sar32mcl_legacy(ptr %ptr, i32 %cl) { 457; CHECK-LABEL: sar32mcl_legacy: 458; CHECK: # %bb.0: # %entry 459; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 460; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 461; CHECK-NEXT: sarl %cl, (%rdi) # encoding: [0xd3,0x3f] 462; CHECK-NEXT: retq # encoding: [0xc3] 463entry: 464 %a = load i32, ptr %ptr 465 %sar = ashr i32 %a, %cl 466 store i32 %sar, ptr %ptr 467 ret void 468} 469 470define void @sar64mcl_legacy(ptr %ptr, i64 %cl) { 471; CHECK-LABEL: sar64mcl_legacy: 472; CHECK: # %bb.0: # %entry 473; CHECK-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1] 474; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx 475; CHECK-NEXT: sarq %cl, (%rdi) # encoding: [0x48,0xd3,0x3f] 476; CHECK-NEXT: retq # encoding: [0xc3] 477entry: 478 %a = load i64, ptr %ptr 479 %sar = ashr i64 %a, %cl 480 store i64 %sar, ptr %ptr 481 ret void 482} 483 484define void @sar8mi_legacy(ptr %ptr) { 485; CHECK-LABEL: sar8mi_legacy: 486; CHECK: # %bb.0: # %entry 487; CHECK-NEXT: sarb $4, (%rdi) # encoding: [0xc0,0x3f,0x04] 488; CHECK-NEXT: retq # encoding: [0xc3] 489entry: 490 %a = load i8, ptr %ptr 491 %sar = ashr i8 %a, 4 492 store i8 %sar, ptr %ptr 493 ret void 494} 495 496define void @sar16mi_legacy(ptr %ptr) { 497; CHECK-LABEL: sar16mi_legacy: 498; CHECK: # %bb.0: # %entry 499; CHECK-NEXT: sarw $4, (%rdi) # encoding: [0x66,0xc1,0x3f,0x04] 500; CHECK-NEXT: retq # encoding: [0xc3] 501entry: 502 %a = load i16, ptr %ptr 503 %sar = ashr i16 %a, 4 504 store i16 %sar, ptr %ptr 505 ret void 506} 507 508define void @sar32mi_legacy(ptr %ptr) { 509; CHECK-LABEL: sar32mi_legacy: 510; CHECK: # %bb.0: # %entry 511; CHECK-NEXT: sarl $4, (%rdi) # encoding: [0xc1,0x3f,0x04] 512; CHECK-NEXT: retq # encoding: [0xc3] 513entry: 514 %a = load i32, ptr %ptr 515 %sar = ashr i32 %a, 4 516 store i32 %sar, ptr %ptr 517 ret void 518} 519 520define void @sar64mi_legacy(ptr %ptr) { 521; CHECK-LABEL: sar64mi_legacy: 522; CHECK: # %bb.0: # %entry 523; CHECK-NEXT: sarq $4, (%rdi) # encoding: [0x48,0xc1,0x3f,0x04] 524; CHECK-NEXT: retq # encoding: [0xc3] 525entry: 526 %a = load i64, ptr %ptr 527 %sar = ashr i64 %a, 4 528 store i64 %sar, ptr %ptr 529 ret void 530} 531