1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s 3 4define i8 @rol8m1(ptr %ptr) { 5; CHECK-LABEL: rol8m1: 6; CHECK: # %bb.0: # %entry 7; CHECK-NEXT: rolb (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xd0,0x07] 8; CHECK-NEXT: retq # encoding: [0xc3] 9entry: 10 %a = load i8, ptr %ptr 11 %0 = shl i8 %a, 1 12 %1 = lshr i8 %a, 7 13 %rol = or i8 %0, %1 14 ret i8 %rol 15} 16 17define i8 @rol8m1_intrinsic(ptr %ptr) { 18; CHECK-LABEL: rol8m1_intrinsic: 19; CHECK: # %bb.0: 20; CHECK-NEXT: rolb (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xd0,0x07] 21; CHECK-NEXT: retq # encoding: [0xc3] 22 %a = load i8, ptr %ptr 23 %f = call i8 @llvm.fshr.i8(i8 %a, i8 %a, i8 7) 24 ret i8 %f 25} 26 27define i16 @rol16m1(ptr %ptr) { 28; CHECK-LABEL: rol16m1: 29; CHECK: # %bb.0: # %entry 30; CHECK-NEXT: rolw (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0xd1,0x07] 31; CHECK-NEXT: retq # encoding: [0xc3] 32entry: 33 %a = load i16, ptr %ptr 34 %0 = shl i16 %a, 1 35 %1 = lshr i16 %a, 15 36 %rol = or i16 %0, %1 37 ret i16 %rol 38} 39 40define i16 @rol16m1_intrinsic(ptr %ptr) { 41; CHECK-LABEL: rol16m1_intrinsic: 42; CHECK: # %bb.0: 43; CHECK-NEXT: rolw (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0xd1,0x07] 44; CHECK-NEXT: retq # encoding: [0xc3] 45 %a = load i16, ptr %ptr 46 %f = call i16 @llvm.fshr.i16(i16 %a, i16 %a, i16 15) 47 ret i16 %f 48} 49 50define i32 @rol32m1(ptr %ptr) { 51; CHECK-LABEL: rol32m1: 52; CHECK: # %bb.0: # %entry 53; CHECK-NEXT: roll (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd1,0x07] 54; CHECK-NEXT: retq # encoding: [0xc3] 55entry: 56 %a = load i32, ptr %ptr 57 %0 = shl i32 %a, 1 58 %1 = lshr i32 %a, 31 59 %rol = or i32 %0, %1 60 ret i32 %rol 61} 62 63define i32 @rol32m1_intrinsic(ptr %ptr) { 64; CHECK-LABEL: rol32m1_intrinsic: 65; CHECK: # %bb.0: 66; CHECK-NEXT: roll (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd1,0x07] 67; CHECK-NEXT: retq # encoding: [0xc3] 68 %a = load i32, ptr %ptr 69 %f = call i32 @llvm.fshr.i32(i32 %a, i32 %a, i32 31) 70 ret i32 %f 71} 72 73define i64 @rol64m1(ptr %ptr) { 74; CHECK-LABEL: rol64m1: 75; CHECK: # %bb.0: # %entry 76; CHECK-NEXT: rolq (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd1,0x07] 77; CHECK-NEXT: retq # encoding: [0xc3] 78entry: 79 %a = load i64, ptr %ptr 80 %0 = shl i64 %a, 1 81 %1 = lshr i64 %a, 63 82 %rol = or i64 %0, %1 83 ret i64 %rol 84} 85 86define i64 @rol64m1_intrinsic(ptr %ptr) { 87; CHECK-LABEL: rol64m1_intrinsic: 88; CHECK: # %bb.0: 89; CHECK-NEXT: rolq (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd1,0x07] 90; CHECK-NEXT: retq # encoding: [0xc3] 91 %a = load i64, ptr %ptr 92 %f = call i64 @llvm.fshr.i64(i64 %a, i64 %a, i64 63) 93 ret i64 %f 94} 95 96define i8 @rol8mcl(ptr %ptr, i8 %cl) { 97; CHECK-LABEL: rol8mcl: 98; CHECK: # %bb.0: # %entry 99; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 100; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 101; CHECK-NEXT: rolb %cl, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xd2,0x07] 102; CHECK-NEXT: retq # encoding: [0xc3] 103entry: 104 %a = load i8, ptr %ptr 105 %0 = shl i8 %a, %cl 106 %1 = sub i8 8, %cl 107 %2 = lshr i8 %a, %1 108 %rol = or i8 %0, %2 109 ret i8 %rol 110} 111 112define i16 @rol16mcl(ptr %ptr, i16 %cl) { 113; CHECK-LABEL: rol16mcl: 114; CHECK: # %bb.0: # %entry 115; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 116; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 117; CHECK-NEXT: rolw %cl, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0xd3,0x07] 118; CHECK-NEXT: retq # encoding: [0xc3] 119entry: 120 %a = load i16, ptr %ptr 121 %0 = shl i16 %a, %cl 122 %1 = sub i16 16, %cl 123 %2 = lshr i16 %a, %1 124 %rol = or i16 %0, %2 125 ret i16 %rol 126} 127 128define i32 @rol32mcl(ptr %ptr, i32 %cl) { 129; CHECK-LABEL: rol32mcl: 130; CHECK: # %bb.0: # %entry 131; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 132; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 133; CHECK-NEXT: roll %cl, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0x07] 134; CHECK-NEXT: retq # encoding: [0xc3] 135entry: 136 %a = load i32, ptr %ptr 137 %0 = shl i32 %a, %cl 138 %1 = sub i32 32, %cl 139 %2 = lshr i32 %a, %1 140 %rol = or i32 %0, %2 141 ret i32 %rol 142} 143 144define i64 @rol64mcl(ptr %ptr, i64 %cl) { 145; CHECK-LABEL: rol64mcl: 146; CHECK: # %bb.0: # %entry 147; CHECK-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1] 148; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx 149; CHECK-NEXT: rolq %cl, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd3,0x07] 150; CHECK-NEXT: retq # encoding: [0xc3] 151entry: 152 %a = load i64, ptr %ptr 153 %0 = shl i64 %a, %cl 154 %1 = sub i64 64, %cl 155 %2 = lshr i64 %a, %1 156 %rol = or i64 %0, %2 157 ret i64 %rol 158} 159 160define i8 @rol8mi(ptr %ptr) { 161; CHECK-LABEL: rol8mi: 162; CHECK: # %bb.0: # %entry 163; CHECK-NEXT: rolb $3, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0xc0,0x07,0x03] 164; CHECK-NEXT: retq # encoding: [0xc3] 165entry: 166 %a = load i8, ptr %ptr 167 %0 = shl i8 %a, 3 168 %1 = lshr i8 %a, 5 169 %rol = or i8 %0, %1 170 ret i8 %rol 171} 172 173define i16 @rol16mi(ptr %ptr) { 174; CHECK-LABEL: rol16mi: 175; CHECK: # %bb.0: # %entry 176; CHECK-NEXT: rolw $3, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0xc1,0x07,0x03] 177; CHECK-NEXT: retq # encoding: [0xc3] 178entry: 179 %a = load i16, ptr %ptr 180 %0 = shl i16 %a, 3 181 %1 = lshr i16 %a, 13 182 %rol = or i16 %0, %1 183 ret i16 %rol 184} 185 186define i32 @rol32mi(ptr %ptr) { 187; CHECK-LABEL: rol32mi: 188; CHECK: # %bb.0: # %entry 189; CHECK-NEXT: roll $3, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0xc1,0x07,0x03] 190; CHECK-NEXT: retq # encoding: [0xc3] 191entry: 192 %a = load i32, ptr %ptr 193 %0 = shl i32 %a, 3 194 %1 = lshr i32 %a, 29 195 %rol = or i32 %0, %1 196 ret i32 %rol 197} 198 199define i64 @rol64mi(ptr %ptr) { 200; CHECK-LABEL: rol64mi: 201; CHECK: # %bb.0: # %entry 202; CHECK-NEXT: rolq $3, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0xc1,0x07,0x03] 203; CHECK-NEXT: retq # encoding: [0xc3] 204entry: 205 %a = load i64, ptr %ptr 206 %0 = shl i64 %a, 3 207 %1 = lshr i64 %a, 61 208 %rol = or i64 %0, %1 209 ret i64 %rol 210} 211 212define i8 @rol8r1(i8 noundef %a) { 213; CHECK-LABEL: rol8r1: 214; CHECK: # %bb.0: # %entry 215; CHECK-NEXT: rolb %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xd0,0xc7] 216; CHECK-NEXT: retq # encoding: [0xc3] 217entry: 218 %0 = shl i8 %a, 1 219 %1 = lshr i8 %a, 7 220 %rol = or i8 %0, %1 221 ret i8 %rol 222} 223 224define i8 @rol8r1_intrinsic(i8 noundef %a) { 225; CHECK-LABEL: rol8r1_intrinsic: 226; CHECK: # %bb.0: 227; CHECK-NEXT: rolb %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xd0,0xc7] 228; CHECK-NEXT: retq # encoding: [0xc3] 229 %f = call i8 @llvm.fshr.i8(i8 %a, i8 %a, i8 7) 230 ret i8 %f 231} 232 233define i16 @rol16r1(i16 noundef %a) { 234; CHECK-LABEL: rol16r1: 235; CHECK: # %bb.0: # %entry 236; CHECK-NEXT: rolw %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0xd1,0xc7] 237; CHECK-NEXT: retq # encoding: [0xc3] 238entry: 239 %0 = shl i16 %a, 1 240 %1 = lshr i16 %a, 15 241 %rol = or i16 %0, %1 242 ret i16 %rol 243} 244 245define i16 @rol16r1_intrinsic(i16 noundef %a) { 246; CHECK-LABEL: rol16r1_intrinsic: 247; CHECK: # %bb.0: 248; CHECK-NEXT: rolw %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0xd1,0xc7] 249; CHECK-NEXT: retq # encoding: [0xc3] 250 %f = call i16 @llvm.fshr.i16(i16 %a, i16 %a, i16 15) 251 ret i16 %f 252} 253 254define i32 @rol32r1(i32 noundef %a) { 255; CHECK-LABEL: rol32r1: 256; CHECK: # %bb.0: # %entry 257; CHECK-NEXT: roll %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd1,0xc7] 258; CHECK-NEXT: retq # encoding: [0xc3] 259entry: 260 %0 = shl i32 %a, 1 261 %1 = lshr i32 %a, 31 262 %rol = or i32 %0, %1 263 ret i32 %rol 264} 265 266define i32 @rol32r1_intrinsic(i32 noundef %a) { 267; CHECK-LABEL: rol32r1_intrinsic: 268; CHECK: # %bb.0: 269; CHECK-NEXT: roll %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd1,0xc7] 270; CHECK-NEXT: retq # encoding: [0xc3] 271 %f = call i32 @llvm.fshr.i32(i32 %a, i32 %a, i32 31) 272 ret i32 %f 273} 274 275define i64 @rol64r1(i64 noundef %a) { 276; CHECK-LABEL: rol64r1: 277; CHECK: # %bb.0: # %entry 278; CHECK-NEXT: rolq %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd1,0xc7] 279; CHECK-NEXT: retq # encoding: [0xc3] 280entry: 281 %0 = shl i64 %a, 1 282 %1 = lshr i64 %a, 63 283 %rol = or i64 %0, %1 284 ret i64 %rol 285} 286 287define i64 @rol64r1_intrinsic(i64 noundef %a) { 288; CHECK-LABEL: rol64r1_intrinsic: 289; CHECK: # %bb.0: 290; CHECK-NEXT: rolq %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd1,0xc7] 291; CHECK-NEXT: retq # encoding: [0xc3] 292 %f = call i64 @llvm.fshr.i64(i64 %a, i64 %a, i64 63) 293 ret i64 %f 294} 295 296define i8 @rol8rcl(i8 noundef %a, i8 %cl) { 297; CHECK-LABEL: rol8rcl: 298; CHECK: # %bb.0: # %entry 299; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 300; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 301; CHECK-NEXT: rolb %cl, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xd2,0xc7] 302; CHECK-NEXT: retq # encoding: [0xc3] 303entry: 304 %0 = shl i8 %a, %cl 305 %1 = sub i8 8, %cl 306 %2 = lshr i8 %a, %1 307 %rol = or i8 %0, %2 308 ret i8 %rol 309} 310 311define i16 @rol16rcl(i16 noundef %a, i16 %cl) { 312; CHECK-LABEL: rol16rcl: 313; CHECK: # %bb.0: # %entry 314; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 315; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 316; CHECK-NEXT: rolw %cl, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0xd3,0xc7] 317; CHECK-NEXT: retq # encoding: [0xc3] 318entry: 319 %0 = shl i16 %a, %cl 320 %1 = sub i16 16, %cl 321 %2 = lshr i16 %a, %1 322 %rol = or i16 %0, %2 323 ret i16 %rol 324} 325 326define i32 @rol32rcl(i32 noundef %a, i32 %cl) { 327; CHECK-LABEL: rol32rcl: 328; CHECK: # %bb.0: # %entry 329; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 330; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 331; CHECK-NEXT: roll %cl, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xd3,0xc7] 332; CHECK-NEXT: retq # encoding: [0xc3] 333entry: 334 %0 = shl i32 %a, %cl 335 %1 = sub i32 32, %cl 336 %2 = lshr i32 %a, %1 337 %rol = or i32 %0, %2 338 ret i32 %rol 339} 340 341define i64 @rol64rcl(i64 noundef %a, i64 %cl) { 342; CHECK-LABEL: rol64rcl: 343; CHECK: # %bb.0: # %entry 344; CHECK-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1] 345; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx 346; CHECK-NEXT: rolq %cl, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0xd3,0xc7] 347; CHECK-NEXT: retq # encoding: [0xc3] 348entry: 349 %0 = shl i64 %a, %cl 350 %1 = sub i64 64, %cl 351 %2 = lshr i64 %a, %1 352 %rol = or i64 %0, %2 353 ret i64 %rol 354} 355 356define i8 @rol8ri(i8 noundef %a) { 357; CHECK-LABEL: rol8ri: 358; CHECK: # %bb.0: # %entry 359; CHECK-NEXT: rolb $3, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xc0,0xc7,0x03] 360; CHECK-NEXT: retq # encoding: [0xc3] 361entry: 362 %0 = shl i8 %a, 3 363 %1 = lshr i8 %a, 5 364 %rol = or i8 %0, %1 365 ret i8 %rol 366} 367 368define i16 @rol16ri(i16 noundef %a) { 369; CHECK-LABEL: rol16ri: 370; CHECK: # %bb.0: # %entry 371; CHECK-NEXT: rolw $3, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0xc1,0xc7,0x03] 372; CHECK-NEXT: retq # encoding: [0xc3] 373entry: 374 %0 = shl i16 %a, 3 375 %1 = lshr i16 %a, 13 376 %rol = or i16 %0, %1 377 ret i16 %rol 378} 379 380define i32 @rol32ri(i32 noundef %a) { 381; CHECK-LABEL: rol32ri: 382; CHECK: # %bb.0: # %entry 383; CHECK-NEXT: roll $3, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xc1,0xc7,0x03] 384; CHECK-NEXT: retq # encoding: [0xc3] 385entry: 386 %0 = shl i32 %a, 3 387 %1 = lshr i32 %a, 29 388 %rol = or i32 %0, %1 389 ret i32 %rol 390} 391 392define i64 @rol64ri(i64 noundef %a) { 393; CHECK-LABEL: rol64ri: 394; CHECK: # %bb.0: # %entry 395; CHECK-NEXT: rolq $3, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0xc1,0xc7,0x03] 396; CHECK-NEXT: retq # encoding: [0xc3] 397entry: 398 %0 = shl i64 %a, 3 399 %1 = lshr i64 %a, 61 400 %rol = or i64 %0, %1 401 ret i64 %rol 402} 403 404define void @rol8m1_legacy(ptr %ptr) { 405; CHECK-LABEL: rol8m1_legacy: 406; CHECK: # %bb.0: # %entry 407; CHECK-NEXT: rolb (%rdi) # encoding: [0xd0,0x07] 408; CHECK-NEXT: retq # encoding: [0xc3] 409entry: 410 %a = load i8, ptr %ptr 411 %0 = shl i8 %a, 1 412 %1 = lshr i8 %a, 7 413 %rol = or i8 %0, %1 414 store i8 %rol, ptr %ptr 415 ret void 416} 417 418define void @rol16m1_legacy(ptr %ptr) { 419; CHECK-LABEL: rol16m1_legacy: 420; CHECK: # %bb.0: # %entry 421; CHECK-NEXT: rolw (%rdi) # encoding: [0x66,0xd1,0x07] 422; CHECK-NEXT: retq # encoding: [0xc3] 423entry: 424 %a = load i16, ptr %ptr 425 %0 = shl i16 %a, 1 426 %1 = lshr i16 %a, 15 427 %rol = or i16 %0, %1 428 store i16 %rol, ptr %ptr 429 ret void 430} 431 432define void @rol32m1_legacy(ptr %ptr) { 433; CHECK-LABEL: rol32m1_legacy: 434; CHECK: # %bb.0: # %entry 435; CHECK-NEXT: roll (%rdi) # encoding: [0xd1,0x07] 436; CHECK-NEXT: retq # encoding: [0xc3] 437entry: 438 %a = load i32, ptr %ptr 439 %0 = shl i32 %a, 1 440 %1 = lshr i32 %a, 31 441 %rol = or i32 %0, %1 442 store i32 %rol, ptr %ptr 443 ret void 444} 445 446define void @rol64m1_legacy(ptr %ptr) { 447; CHECK-LABEL: rol64m1_legacy: 448; CHECK: # %bb.0: # %entry 449; CHECK-NEXT: rolq (%rdi) # encoding: [0x48,0xd1,0x07] 450; CHECK-NEXT: retq # encoding: [0xc3] 451entry: 452 %a = load i64, ptr %ptr 453 %0 = shl i64 %a, 1 454 %1 = lshr i64 %a, 63 455 %rol = or i64 %0, %1 456 store i64 %rol, ptr %ptr 457 ret void 458} 459 460define void @rol8mcl_legacy(ptr %ptr, i8 %cl) { 461; CHECK-LABEL: rol8mcl_legacy: 462; CHECK: # %bb.0: # %entry 463; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 464; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 465; CHECK-NEXT: rolb %cl, (%rdi) # encoding: [0xd2,0x07] 466; CHECK-NEXT: retq # encoding: [0xc3] 467entry: 468 %a = load i8, ptr %ptr 469 %0 = shl i8 %a, %cl 470 %1 = sub i8 8, %cl 471 %2 = lshr i8 %a, %1 472 %rol = or i8 %0, %2 473 store i8 %rol, ptr %ptr 474 ret void 475} 476 477define void @rol16mcl_legacy(ptr %ptr, i16 %cl) { 478; CHECK-LABEL: rol16mcl_legacy: 479; CHECK: # %bb.0: # %entry 480; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 481; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 482; CHECK-NEXT: rolw %cl, (%rdi) # encoding: [0x66,0xd3,0x07] 483; CHECK-NEXT: retq # encoding: [0xc3] 484entry: 485 %a = load i16, ptr %ptr 486 %0 = shl i16 %a, %cl 487 %1 = sub i16 16, %cl 488 %2 = lshr i16 %a, %1 489 %rol = or i16 %0, %2 490 store i16 %rol, ptr %ptr 491 ret void 492} 493 494define void @rol32mcl_legacy(ptr %ptr, i32 %cl) { 495; CHECK-LABEL: rol32mcl_legacy: 496; CHECK: # %bb.0: # %entry 497; CHECK-NEXT: movl %esi, %ecx # encoding: [0x89,0xf1] 498; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx 499; CHECK-NEXT: roll %cl, (%rdi) # encoding: [0xd3,0x07] 500; CHECK-NEXT: retq # encoding: [0xc3] 501entry: 502 %a = load i32, ptr %ptr 503 %0 = shl i32 %a, %cl 504 %1 = sub i32 32, %cl 505 %2 = lshr i32 %a, %1 506 %rol = or i32 %0, %2 507 store i32 %rol, ptr %ptr 508 ret void 509} 510 511define void @rol64mcl_legacy(ptr %ptr, i64 %cl) { 512; CHECK-LABEL: rol64mcl_legacy: 513; CHECK: # %bb.0: # %entry 514; CHECK-NEXT: movq %rsi, %rcx # encoding: [0x48,0x89,0xf1] 515; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx 516; CHECK-NEXT: rolq %cl, (%rdi) # encoding: [0x48,0xd3,0x07] 517; CHECK-NEXT: retq # encoding: [0xc3] 518entry: 519 %a = load i64, ptr %ptr 520 %0 = shl i64 %a, %cl 521 %1 = sub i64 64, %cl 522 %2 = lshr i64 %a, %1 523 %rol = or i64 %0, %2 524 store i64 %rol, ptr %ptr 525 ret void 526} 527 528define void @rol8mi_legacy(ptr %ptr) { 529; CHECK-LABEL: rol8mi_legacy: 530; CHECK: # %bb.0: # %entry 531; CHECK-NEXT: rolb $3, (%rdi) # encoding: [0xc0,0x07,0x03] 532; CHECK-NEXT: retq # encoding: [0xc3] 533entry: 534 %a = load i8, ptr %ptr 535 %0 = shl i8 %a, 3 536 %1 = lshr i8 %a, 5 537 %rol = or i8 %0, %1 538 store i8 %rol, ptr %ptr 539 ret void 540} 541 542define void @rol16mi_legacy(ptr %ptr) { 543; CHECK-LABEL: rol16mi_legacy: 544; CHECK: # %bb.0: # %entry 545; CHECK-NEXT: rolw $3, (%rdi) # encoding: [0x66,0xc1,0x07,0x03] 546; CHECK-NEXT: retq # encoding: [0xc3] 547entry: 548 %a = load i16, ptr %ptr 549 %0 = shl i16 %a, 3 550 %1 = lshr i16 %a, 13 551 %rol = or i16 %0, %1 552 store i16 %rol, ptr %ptr 553 ret void 554} 555 556define void @rol32mi_legacy(ptr %ptr) { 557; CHECK-LABEL: rol32mi_legacy: 558; CHECK: # %bb.0: # %entry 559; CHECK-NEXT: roll $3, (%rdi) # encoding: [0xc1,0x07,0x03] 560; CHECK-NEXT: retq # encoding: [0xc3] 561entry: 562 %a = load i32, ptr %ptr 563 %0 = shl i32 %a, 3 564 %1 = lshr i32 %a, 29 565 %rol = or i32 %0, %1 566 store i32 %rol, ptr %ptr 567 ret void 568} 569 570define void @rol64mi_legacy(ptr %ptr) { 571; CHECK-LABEL: rol64mi_legacy: 572; CHECK: # %bb.0: # %entry 573; CHECK-NEXT: rolq $3, (%rdi) # encoding: [0x48,0xc1,0x07,0x03] 574; CHECK-NEXT: retq # encoding: [0xc3] 575entry: 576 %a = load i64, ptr %ptr 577 %0 = shl i64 %a, 3 578 %1 = lshr i64 %a, 61 579 %rol = or i64 %0, %1 580 store i64 %rol, ptr %ptr 581 ret void 582} 583